Changes required for x86 address spaces

Changes required for x86 address spaces

[Richard Henderson]

Hi!

Here are some notes regarding gdb changes required in order to support

   https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01972.html

In my opinion, DW_AT_address_class is best when the alternate address space is 
truely disjoint, or has a different pointer width.  That certainly matches up 
with the language in the dwarf4 doc, and existing usage in the embedded targets.

Thus I've arranged for these x86 address spaces to use DW_AT_segment, a dwarf 
location containing an offset from the flat address space.  For the purposes of 
the debug info, I map __seg_tls to __seg_fs or __seg_gs.

The x86-64 abi already has dwarf register numbers allocated for fs_base and 
gs_base.  Thus the location is simply the trivial DW_OP_regx 58 or 59 
respectively.  The i386 abi does not yet have the same register number 
pre-allocated; the latest version I see in HJL's github document has dwarf 
registers 58-59 within a block of reserved values, so for now I'm using the 
same values for both x86-64 and i386.

One of these days, the various operating systems may enable the fsgsbase ISA 
extension present in Haswell cpus, so making these values visible within the 
debugger now is a nice side effect.

What isn't present in gdb at present is any support for DW_AT_segment, and I'm 
not familiar enough with the internals to work out how to enable that.


r~

Re: Changes required for x86 address spaces

[H.J. Lu]

On Tue, Oct 20, 2015 at 3:25 PM, Richard Henderson <rth@redhat.com> wrote:
> Hi!
>
> Here are some notes regarding gdb changes required in order to support
>
>   https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01972.html
>
> In my opinion, DW_AT_address_class is best when the alternate address space
> is truely disjoint, or has a different pointer width.  That certainly
> matches up with the language in the dwarf4 doc, and existing usage in the
> embedded targets.
>
> Thus I've arranged for these x86 address spaces to use DW_AT_segment, a
> dwarf location containing an offset from the flat address space.  For the
> purposes of the debug info, I map __seg_tls to __seg_fs or __seg_gs.
>
> The x86-64 abi already has dwarf register numbers allocated for fs_base and
> gs_base.  Thus the location is simply the trivial DW_OP_regx 58 or 59
> respectively.  The i386 abi does not yet have the same register number
> pre-allocated; the latest version I see in HJL's github document has dwarf
> registers 58-59 within a block of reserved values, so for now I'm using the
> same values for both x86-64 and i386.
>

Table 2.14: DWARF Register Number Mapping in Intel386 psABI:

https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI

defines

Segment Register ES 40 %es
Segment Register CS 41 %cs
Segment Register SS 42 %ss
Segment Register DS 43 %ds
Segment Register FS 44 %fs
Segment Register GS 45 %gs

Why not use them?


-- 
H.J.

Re: Changes required for x86 address spaces

[Gary Benson]

H.J. Lu wrote:
> On Tue, Oct 20, 2015 at 3:25 PM, Richard Henderson <rth@redhat.com> wrote:
> > Here are some notes regarding gdb changes required in order to support
> >
> >   https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01972.html
> >
> > In my opinion, DW_AT_address_class is best when the alternate
> > address space is truely disjoint, or has a different pointer
> > width.  That certainly matches up with the language in the dwarf4
> > doc, and existing usage in the embedded targets.
> >
> > Thus I've arranged for these x86 address spaces to use
> > DW_AT_segment, a dwarf location containing an offset from the flat
> > address space.  For the purposes of the debug info, I map
> > __seg_tls to __seg_fs or __seg_gs.
> >
> > The x86-64 abi already has dwarf register numbers allocated for
> > fs_base and gs_base.  Thus the location is simply the trivial
> > DW_OP_regx 58 or 59 respectively.  The i386 abi does not yet have
> > the same register number pre-allocated; the latest version I see
> > in HJL's github document has dwarf registers 58-59 within a block
> > of reserved values, so for now I'm using the same values for both
> > x86-64 and i386.
> 
> Table 2.14: DWARF Register Number Mapping in Intel386 psABI:
> 
> https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI
> 
> defines
> 
> Segment Register ES 40 %es
> Segment Register CS 41 %cs
> Segment Register SS 42 %ss
> Segment Register DS 43 %ds
> Segment Register FS 44 %fs
> Segment Register GS 45 %gs
> 
> Why not use them?

x86 has %fs and %fs_base, and %gs and %gs_base.  I don't understand
the difference but I do know that when libthread_db asks GDB to look
in FS or GS (in ps_get_thread_area) what GDB actually returns is the
contents of FS_BASE or GS_BASE.

(If GDB could directly access FS_BASE and GS_BASE through regcache or
whatever then thread debugging could be done without the ptrace hacks
in ps_get_thread_area (so presumably faster) but I don't know how to
add this support so I haven't done it.)

Cheers,
Gary

-- 
http://gbenson.net/

Re: Changes required for x86 address spaces

[Richard Henderson]

On 10/20/2015 10:16 PM, Gary Benson wrote:
> H.J. Lu wrote:
>> On Tue, Oct 20, 2015 at 3:25 PM, Richard Henderson <rth@redhat.com> wrote:
>>> Here are some notes regarding gdb changes required in order to support
>>>
>>>    https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01972.html
>>>
>>> In my opinion, DW_AT_address_class is best when the alternate
>>> address space is truely disjoint, or has a different pointer
>>> width.  That certainly matches up with the language in the dwarf4
>>> doc, and existing usage in the embedded targets.
>>>
>>> Thus I've arranged for these x86 address spaces to use
>>> DW_AT_segment, a dwarf location containing an offset from the flat
>>> address space.  For the purposes of the debug info, I map
>>> __seg_tls to __seg_fs or __seg_gs.
>>>
>>> The x86-64 abi already has dwarf register numbers allocated for
>>> fs_base and gs_base.  Thus the location is simply the trivial
>>> DW_OP_regx 58 or 59 respectively.  The i386 abi does not yet have
>>> the same register number pre-allocated; the latest version I see
>>> in HJL's github document has dwarf registers 58-59 within a block
>>> of reserved values, so for now I'm using the same values for both
>>> x86-64 and i386.
>>
>> Table 2.14: DWARF Register Number Mapping in Intel386 psABI:
>>
>> https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI
>>
>> defines
>>
>> Segment Register ES 40 %es
>> Segment Register CS 41 %cs
>> Segment Register SS 42 %ss
>> Segment Register DS 43 %ds
>> Segment Register FS 44 %fs
>> Segment Register GS 45 %gs
>>
>> Why not use them?
>
> x86 has %fs and %fs_base, and %gs and %gs_base.  I don't understand
> the difference but I do know that when libthread_db asks GDB to look
> in FS or GS (in ps_get_thread_area) what GDB actually returns is the
> contents of FS_BASE or GS_BASE.

Exactly.  The segment register contains a "descriptor", which in 32-bit land is 
a 16-bit quantity that indexes a table that describes the segment -- base, 
length, permissions, etc.  In 64-bit land they've pretty much done away with 
the table and left two quantities, fs_base and gs_base, that are applied when 
using the appropriate segment overrides.

But even for 32-bit, I need the segment base, not the descriptor.  GDB ought to 
be able to pull this value out via ptrace, at least for specific descriptors 
between linux's GDT_ENTRY_TLS_MIN and GDT_ENTRY_TLS_MAX.  Sadly, there's no way 
for gdb to read arbitrary segment descriptors.

> (If GDB could directly access FS_BASE and GS_BASE through regcache or
> whatever then thread debugging could be done without the ptrace hacks
> in ps_get_thread_area (so presumably faster) but I don't know how to
> add this support so I haven't done it.)

I was thinking the same thing.  Presumably all one needs to do is define new 
architecture registers and fill in the blanks.  But I've lost track of how to 
do that these days; it seems to be scattered across 19 different files...


r~

Re: Changes required for x86 address spaces

[Pedro Alves]

On 10/21/2015 06:47 PM, Richard Henderson wrote:

> I was thinking the same thing.  Presumably all one needs to do is define new 
> architecture registers and fill in the blanks.  But I've lost track of how to 
> do that these days; it seems to be scattered across 19 different files...

Yeah, on x86-64, fs_base and fs_base are available in user_regs_struct
nowadays, thus accessible with PTRACE_PEEKUSER and PTRACE_GETREGSET.

Basically you need to:

 - add new gdb register numbers to amd64-tdep.h
 - add the ptrace/gdb register mapping to amd64-linux-tdep.c:amd64_linux_gregset_reg_offset
 - add new xml files to gdb/features/i386/
 - make gdb/x86-linux-nat.c:x86_linux_read_description return the new description.

Thanks,
Pedro Alves