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From: Jim Wilson <jimw@sifive.com>
To: John Baldwin <jhb@freebsd.org>
Cc: Simon Marchi <simon.marchi@polymtl.ca>,
	"Ge, Lei" <Lei.Ge@windriver.com>,
	 "gdb@sourceware.org" <gdb@sourceware.org>,
	"Xin, Wenyan" <Wenyan.Xin@windriver.com>
Subject: Re: GDB will set bp at a function for RISC-V when step over this function call
Date: Wed, 22 Sep 2021 14:48:58 -0700	[thread overview]
Message-ID: <CAFyWVaa5U0cMdezJVa-qQ7xe4-r10zHcWEPc-qWFvQ9L1BAumQ@mail.gmail.com> (raw)
In-Reply-To: <bd168873-cecb-d738-576e-f3af94497a4a@FreeBSD.org>

On Mon, Sep 20, 2021 at 10:06 AM John Baldwin <jhb@freebsd.org> wrote:

> RISC-V doesn't (to my knowledge) have support for hardware single step and
> should be using software single step on bare metal as well.
>

There is hardware single-step/breakpoint/watchpoint support.  However, in
old versions of the debug spec (e.g. HiFive Unleashed), this support was
only visible via jtag, and hence unusable to linux/freebsd/etc.  But
openocd does have hardware single-step/breakpoint/watchport support which
does work.  People doing bare metal debugging are expected to use openocd
with gdb.  In new versions of the debug spec (e.g. HiFive Unmatched), this
support is now visible in machine mode, but we need opensbi and kernel
support before gdb can use it.  I don't know of anyone working on that,
though I might try it if I ever find the time.

Jim

      reply	other threads:[~2021-09-22 21:49 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-17  7:57 Ge, Lei
2021-09-19  2:04 ` Simon Marchi
2021-09-20 17:06   ` John Baldwin
2021-09-22 21:48     ` Jim Wilson [this message]

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