From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by sourceware.org (Postfix) with ESMTPS id 0820E3854801 for ; Wed, 31 Mar 2021 14:06:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 0820E3854801 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=tim@sifive.com Received: by mail-ej1-x632.google.com with SMTP id b7so30281953ejv.1 for ; Wed, 31 Mar 2021 07:06:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=dxgpFldO38rKxCKMrGrDoWSYkMREmn5feuR7COGkK+U=; b=ggY3yRuirGf6SaSy2G3GmclHiYhSWAGz0/m9KjeKRubF6ExJFvlfBiKdyNzU+jph+q I6iVR48ojd9kJwFYjORc0RCYZP95UjBj0Hdd02z6o59rw9vc8hjzWZuK3lN8orgStHk2 bCNYpdl3GzDrvidKuK9MVC2BBdS9rtNh9s2RZF+JUsAWYAIT96SiebJ1hlJoy1CRUpDF yrFpKcbwPJdwXKifmuSctGpE0ALiVBule73yI9AkY8hTKau81/qxvfEW5UHCpcBSuBmY JXKcLZL5sL8MZ/+X5ZodLgChlSLsI0QBdyAy1uA2eq34pQBngWWgxJjTnHiFGjOt0y/L Y1cA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=dxgpFldO38rKxCKMrGrDoWSYkMREmn5feuR7COGkK+U=; b=TgRjCmv71yTyWuuPZW2BobLVrewqMaQoRKctQQy0YOeCy7c4xVvuf6DxMxVPoTry/i gtlwX8ZLp8Z2NIse/E9CIhGWIWD5emaV7GRtqexOEbaCbmJ1eqWHdUHEVaOqhEbAqpAk qBfcNtlqpyFTPtBU48a14mSOowMyLI0mXvZFBosF0Fz+uus6Iq0+LlB5WEgD3UYuNCrE J+XLc2R/pcMlYvQ5d2nIavY+mzLM6EInbdpqB2SyJLZZoi7xijkhFO5uJUSkTsP88ZO0 J83e0+3DVdM92kGGuyI4RTz+wICoD0nRnCnusp60xFbAsaaICGBa+HQYFvygcEvBkvwI JSyw== X-Gm-Message-State: AOAM532wVLoEouL33OBro1j0Dnw7qgzqfUJ35uvMCRcONmLluqyXcXwn 8VruQw/DnNTHjkJb3Lbvo+TCYsoWdVujpNjukhBOQA== X-Google-Smtp-Source: ABdhPJwJ9YF5ZmBJ3X6Ne78Cx0oLCX6P32BV5ZxrG7zaYhyEmArALVgQkEcbn7/3hqkfe5KWoAJfNqctMdRunNBjHkw= X-Received: by 2002:a17:907:211b:: with SMTP id qn27mr3680385ejb.203.1617199590065; Wed, 31 Mar 2021 07:06:30 -0700 (PDT) MIME-Version: 1.0 References: <6b00bbbe-1400-7f11-bdcf-811595bf8e31@polymtl.ca> <1c8fec3c-0d7e-d133-bf88-adaf764473f1@polymtl.ca> In-Reply-To: From: Tim Newsome Date: Wed, 31 Mar 2021 07:06:19 -0700 Message-ID: Subject: Re: Remote query for structure layout To: David Blaikie Cc: Simon Marchi , gdb X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, HTML_MESSAGE, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org Content-Type: text/plain; charset="UTF-8" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: gdb@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Mar 2021 14:06:33 -0000 On Tue, Mar 30, 2021 at 8:27 PM David Blaikie wrote: > (guess a side question: How's this different from other systems? I > don't know how other/more common systems handle registers during > signals) Other systems have this same problem. https://sourceforge.net/p/openocd/code/ci/master/tree/src/rtos/FreeRTOS.c around line 440 has some heuristics. For ARM, it assumes there are FPU registers on the stack "if (cpacr & 0x00F00000)". For Cortex-M, it checks whether there are FPU registers on the stack by reading something else off the stack. The problem is worse on RISC-V because the architecture is intended to be extensible. E.g. for pulpino additional registers are saved on the stack, defined in https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/95433d02848af0d274648ae4cdd846f6eff76dde/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h#L76 Tim