From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23475 invoked by alias); 3 May 2012 19:41:47 -0000 Received: (qmail 23465 invoked by uid 22791); 3 May 2012 19:41:45 -0000 X-SWARE-Spam-Status: No, hits=-4.6 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,KHOP_RCVD_TRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE X-Spam-Check-By: sourceware.org Received: from mail-ob0-f169.google.com (HELO mail-ob0-f169.google.com) (209.85.214.169) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 03 May 2012 19:41:32 +0000 Received: by obbwd18 with SMTP id wd18so3568183obb.0 for ; Thu, 03 May 2012 12:41:31 -0700 (PDT) MIME-Version: 1.0 Received: by 10.182.77.167 with SMTP id t7mr835817obw.10.1336074091492; Thu, 03 May 2012 12:41:31 -0700 (PDT) Received: by 10.182.32.4 with HTTP; Thu, 3 May 2012 12:41:31 -0700 (PDT) In-Reply-To: <30865C01C5AF4B6B9B01901B792C4EF5@soleil> References: <4F96A614.3040303@mentor.com> <4F96A812.4000008@mentor.com> <4F96B68C.3050703@mentor.com> <4F96C2A7.2010206@mentor.com> <4F97E547.4070307@mentor.com> <30865C01C5AF4B6B9B01901B792C4EF5@soleil> Date: Thu, 03 May 2012 19:41:00 -0000 Message-ID: Subject: Re: Hardware watchpoint for read From: Xin Tong To: Philippe Waroquiers Cc: "Gustavo, Luis" , gdb@sourceware.org Content-Type: text/plain; charset=ISO-8859-1 Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org X-SW-Source: 2012-05/txt/msg00013.txt.bz2 On Thu, May 3, 2012 at 3:19 PM, Philippe Waroquiers wrote: >>> what are the performance penalties of having a watchpoint on a memory >>> location in the state of the art x86 processor. Because it might be >>> implemented with a parallel circuitry in the processor, my guess is >>> that it could be cheap. >> >> >> Do you mean a hardware watchpoint? It's hard to say for sure without >> looking at the processors inner workings, but the penalty is probably very >> small. >> >> When the conditions are satisfied, a TRAP will be generated and it will >> get through to the debugger via the kernel. >> >> Suppose we issue a continue command... For the debugger, the inferior will >> run uninterrupted while the hardware watchpoint is active. >> >> This is not the case with software watchpoints, as the debugger will be >> constantly touching the inferior while it runs. > > Which makes software watchpoints extremely slow, while hardware > watchpoints have limitations (e.g. in nr or size). > Note that the Valgrind gdbserver (in 3.7.0) provides "unlimited simulated > hw watchpoints" : these are slower than real hw watchpoints, but "only" > suffer from the Valgrind slowdown. > > Philippe > The breakpoint instructions (int 3 on x86) are inserted in the translation process ? Xin