From: Martin Simmons <qqxnjvamvxwx@dyxyl.com>
To: Jeff Law <jeffreyalaw@gmail.com>
Cc: gdb@sourceware.org
Subject: Re: Fwd: [RFA] Fix for mcore simulator
Date: Tue, 10 Oct 2023 22:35:40 +0100 [thread overview]
Message-ID: <je8r8acg9f.fsf@debian-BULLSEYE-live-builder-AMD64> (raw)
In-Reply-To: <9f2c4844-c2ef-417b-ba09-9f71c7066759@gmail.com> (message from Jeff Law via Gdb on Thu, 5 Oct 2023 10:09:44 -0600)
>>>>> On Thu, 5 Oct 2023 10:09:44 -0600, Jeff Law via Gdb said:
>
> Of course if the code is supposed to behave the same, then that points
> to problems elsewhere (assembler, linker, simulator). Sure enough the
> mcore simulator was mis-handling the sign extension instructions. The
> simulator implementation of sextb is via paired shift-by-24 operations.
> Similarly the simulator implements sexth via paired shift-by-16 operations.
>
> The temporary holding the value was declared as a "long" thus this
> approach worked fine for hosts with a 32 bit wide long and failed
> miserably for hosts with a 64 bit wide long.
>
> This patch makes the shift count automatically adjust based on the size
> of the temporary. It includes a simple test for sextb and sexth. I
> have _not_ done a full audit of the mcore simulator for more 32->64 bit
> issues.
The use of long seems bogus to me. Why not just declare tmp as int32_t?
__Martin
next prev parent reply other threads:[~2023-10-11 9:15 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1d854df9-b28c-41eb-af7c-e3a423885558@gmail.com>
2023-10-05 16:09 ` Jeff Law
2023-10-10 17:21 ` Tom Tromey
2023-10-10 21:35 ` Martin Simmons [this message]
2023-10-11 16:49 ` Jeff Law
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