From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jiri Smid To: gdb@sources.redhat.com Subject: x86_64 config files Date: Thu, 05 Apr 2001 04:12:00 -0000 Message-id: X-SW-Source: 2001-04/msg00040.html Hi, There are config files for AMD x86_64 architecture. The config headers include i386 stuff and redefine some parts. In this first version there are redefined registers. diff -uNr gdb.orig/gdb/config/i386/nm-x86_64.h gdb/gdb/config/i386/nm-x86_64.h --- gdb.orig/gdb/config/i386/nm-x86_64.h Thu Jan 1 01:00:00 1970 +++ gdb/gdb/config/i386/nm-x86_64.h Thu Apr 5 11:17:38 2001 @@ -0,0 +1,28 @@ +/* Native support for Linux/x86_64. + Copyright 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, + 1999, 2000 + Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#ifndef NM_X86_64_H +#define NM_X86_64_H + +#include "i386/nm-linux.h" + +#endif /* NM_X86_64.h */ diff -uNr gdb.orig/gdb/config/i386/tm-i386.h gdb/gdb/config/i386/tm-i386.h --- gdb.orig/gdb/config/i386/tm-i386.h Thu Mar 15 00:23:11 2001 +++ gdb/gdb/config/i386/tm-i386.h Thu Apr 5 11:54:42 2001 @@ -200,7 +200,7 @@ /* Sizes of individual register sets. These cover the entire register file, so summing up the sizes of those portions actually present yields REGISTER_BYTES. */ -#define SIZEOF_GREGS (NUM_GREGS * 4) +#define SIZEOF_GREGS (NUM_GREGS * REGISTER_SIZE) #define SIZEOF_FPU_REGS (8 * FPU_REG_RAW_SIZE) #define SIZEOF_FPU_CTRL_REGS \ ((LAST_FPU_CTRL_REGNUM - FIRST_FPU_CTRL_REGNUM + 1) * 4) diff -uNr gdb.orig/gdb/config/i386/tm-x86_64.h gdb/gdb/config/i386/tm-x86_64.h --- gdb.orig/gdb/config/i386/tm-x86_64.h Thu Jan 1 01:00:00 1970 +++ gdb/gdb/config/i386/tm-x86_64.h Thu Apr 5 11:57:55 2001 @@ -0,0 +1,167 @@ +/* Definitions to target GDB to GNU/Linux on x86_64. + Copyright 1992, 1993, 1995, 1996, 1998, 1999, 2000, 2001 + Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#ifndef TM_X86_64_H +#define TM_X86_64_H + +#define X86_64_GNULINUX_TARGET +#define HAVE_REX_REGS +#define HAVE_SSE2_REGS + +#include "i386/tm-linux.h" + +/* Although the x86_64 extended floating-point has only 80 significant + bits, a `long double' actually takes up 128, probably to enforce + alignment. */ + +#undef TARGET_LONG_DOUBLE_BIT +#define TARGET_LONG_DOUBLE_BIT 128 + +/* Say how long (ordinary) registers are. This is a piece of bogosity + used in push_word and a few other places; REGISTER_RAW_SIZE is the + real way to know how big a register is. */ + +#undef REGISTER_SIZE +#define REGISTER_SIZE 8 + + +/* Register extensions + HAVE_REX_REGS --- GPR x86_64 register file extensions + HAVE_SSE2_REGS --- SSE2 register file extensions */ + +/* Number of GPR REX registers. */ +#ifdef HAVE_REX_REGS +#define NUM_REX_REGS (8) +#else +#define NUM_REX_REGS (0) +#endif + +/* Number of SSE registers. */ +#ifdef HAVE_SSE2_REGS +#undef NUM_SSE_REGS +#define NUM_SSE_REGS (17) +#endif + +#undef NUM_REGS +#define NUM_REGS (NUM_GREGS + NUM_FREGS + NUM_REX_REGS + NUM_REX_REGS\ + + NUM_SSE_REGS) + +/* Largest number of registers we could have in any configuration. */ +#undef MAX_NUM_REGS +#define MAX_NUM_REGS (16 + 16 + 8 + 9 + 8) + +/* Initializer for an array of names of registers. There should be at least + NUM_REGS strings in this initializer. Any excess ones are simply ignored. + The order of the first 16 registers must match the compiler's numbering + scheme (which is the same as the 386 scheme) and also regmap in the various + *-nat.c files. */ + +#undef REGISTER_NAMES +#define REGISTER_NAMES { "rax", "rdx", "rcx", "rbx", \ + "rsi", "rdi", "rbp", "rsp", \ + "r8", "r9", "r10", "r11", \ + "r12", "r13", "r14", "r15", \ + "rip", "eflags", \ + "st0", "st1", "st2", "st3", \ + "st4", "st5", "st6", "st7", \ + "fctrl", "fstat", "ftag", "fiseg", \ + "fioff", "foseg", "fooff", "fop", \ + "xmm0", "xmm1", "xmm2", "xmm3", \ + "xmm4", "xmm5", "xmm6", "xmm7", \ + "xmm8", "xmm9", "xmm10", "xmm11", \ + "xmm12", "xmm13", "xmm14", "xmm15", \ + "mxcsr" \ + } + +/* Register numbers of various important registers. + Note that some of these values are "real" register numbers, + and correspond to the general registers of the machine, + and some are "phony" register numbers which are too large + to be actual register numbers as far as the user is concerned + but do serve to get the desired values when passed to read_register. */ + +#undef FP_REGNUM +#define FP_REGNUM 6 /* (ebp) Contains address of executing stack + frame */ +#undef SP_REGNUM +#define SP_REGNUM 7 /* (usp) Contains address of top of stack */ +#undef PC_REGNUM +#define PC_REGNUM 16 /* (eip) Contains program counter */ +#undef PS_REGNUM +#define PS_REGNUM 17 /* (ps) Contains processor status */ + +/* These registers are present only if HAVE_I387_REGS is #defined. + We promise that FP0 .. FP7 will always be consecutive register numbers. */ +#undef FP0_REGNUM +#define FP0_REGNUM 18 /* first FPU floating-point register */ +#undef FP7_REGNUM +#define FP7_REGNUM 25 /* last FPU floating-point register */ + +/* All of these control registers (except for FCOFF and FDOFF) are + sixteen bits long (at most) in the FPU, but are zero-extended to + thirty-two bits in GDB's register file. This makes it easier to + compute the size of the control register file, and somewhat easier + to convert to and from the FSAVE instruction's 32-bit format. */ +#undef FIRST_FPU_CTRL_REGNUM +#define FIRST_FPU_CTRL_REGNUM 26 +#undef FCTRL_REGNUM +#define FCTRL_REGNUM 26 /* FPU control word */ +#undef FPC_REGNUM +#define FPC_REGNUM 26 /* old name for FCTRL_REGNUM */ +#undef FSTAT_REGNUM +#define FSTAT_REGNUM 27 /* FPU status word */ +#undef FTAG_REGNUM +#define FTAG_REGNUM 28 /* FPU register tag word */ +#undef FCS_REGNUM +#define FCS_REGNUM 29 /* FPU instruction's code segment selector + 16 bits, called "FPU Instruction Pointer + Selector" in the x86 manuals */ +#undef FCOFF_REGNUM +#define FCOFF_REGNUM 30 /* FPU instruction's offset within segment + ("Fpu Code OFFset") */ +#undef FDS_REGNUM +#define FDS_REGNUM 31 /* FPU operand's data segment */ +#undef FDOFF_REGNUM +#define FDOFF_REGNUM 32 /* FPU operand's offset within segment */ +#undef FOP_REGNUM +#define FOP_REGNUM 33 /* FPU opcode, bottom eleven bits */ +#undef LAST_FPU_CTRL_REGNUM +#define LAST_FPU_CTRL_REGNUM 33 + +/* These registers are present only if HAVE_SSE_REGS is #defined. + We promise that XMM0 .. XMM7 will always have consecutive reg numbers. */ +#undef XMM0_REGNUM +#define XMM0_REGNUM 34 /* first SSE data register */ +#undef XMM7_REGNUM +#define XMM7_REGNUM 41 /* last SSE data register */ +#define XMM8_REGNUM 42 /* first SSE2 data register */ +#define XMM15_REGNUM 46 /* last SSE2 data register */ +#undef MXCSR_REGNUM +#define MXCSR_REGNUM 47 /* Streaming SIMD Extension control/status */ + +#undef IS_SSE_REGNUM +#define IS_SSE_REGNUM(n) (XMM0_REGNUM <= (n) && (n) <= XMM15_REGNUM) + +/* Sizes of SSE register set */ +#undef SIZEOF_SSE_REGS +#define SIZEOF_SSE_REGS (8 * 16 + 4) + +#endif /* ifndef TM_X86_64_H */ diff -uNr gdb.orig/gdb/config/i386/x86_64.mh gdb/gdb/config/i386/x86_64.mh --- gdb.orig/gdb/config/i386/x86_64.mh Thu Jan 1 01:00:00 1970 +++ gdb/gdb/config/i386/x86_64.mh Thu Apr 5 11:10:55 2001 @@ -0,0 +1,11 @@ +# Host: AMD x86_64 running GNU/Linux + +XM_FILE= xm-x86_64.h +XDEPFILES= + +NAT_FILE= nm-x86_64.h +NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o \ + core-aout.o i386v-nat.o i386-linux-nat.o i387-nat.o \ + proc-service.o thread-db.o lin-lwp.o + +LOADLIBES = -ldl -rdynamic diff -uNr gdb.orig/gdb/config/i386/x86_64.mt gdb/gdb/config/i386/x86_64.mt --- gdb.orig/gdb/config/i386/x86_64.mt Thu Jan 1 01:00:00 1970 +++ gdb/gdb/config/i386/x86_64.mt Thu Apr 5 10:10:55 2001 @@ -0,0 +1,6 @@ +# Target: AMD x86_64 running GNU/Linux +TDEPFILES= i386-tdep.o i386-linux-tdep.o i387-tdep.o \ + solib.o solib-svr4.o solib-legacy.o +TM_FILE= tm-x86_64.h + +GDBSERVER_DEPFILES= low-linux.o diff -uNr gdb.orig/gdb/config/i386/xm-x86_64.h gdb/gdb/config/i386/xm-x86_64.h --- gdb.orig/gdb/config/i386/xm-x86_64.h Thu Jan 1 01:00:00 1970 +++ gdb/gdb/config/i386/xm-x86_64.h Thu Apr 5 11:15:11 2001 @@ -0,0 +1,42 @@ +/* Native support for GNU/Linux, for GDB, the GNU debugger. + Copyright 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1999, 2000 + Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#ifndef XM_X86_64_H +#define XM_X86_64_H + +#define HOST_X86_64 + +#define HOST_BYTE_ORDER LITTLE_ENDIAN + +#define HOST_LONG_DOUBLE_FORMAT &floatformat_i387_ext + +#define HAVE_TERMIOS + +/* This is the amount to subtract from u.u_ar0 + to get the offset in the core file of the register values. */ +#define KERNEL_U_ADDR 0x0 + +#define NEED_POSIX_SETPGID + +/* Need R_OK etc, but USG isn't defined. */ +#include + +#endif /* #ifndef XM_X86_64_H */ diff -uNr gdb.orig/gdb/configure.host gdb/gdb/configure.host --- gdb.orig/gdb/configure.host Fri Mar 9 04:56:03 2001 +++ gdb/gdb/configure.host Thu Mar 29 19:29:42 2001 @@ -161,4 +161,6 @@ vax-*-ultrix2*) gdb_host=vaxult2 ;; vax-*-ultrix*) gdb_host=vaxult ;; +x86_64-*-linux*) gdb_host=linux ;; + esac diff -uNr gdb.orig/gdb/configure.tgt gdb/gdb/configure.tgt --- gdb.orig/gdb/configure.tgt Fri Mar 9 04:56:03 2001 +++ gdb/gdb/configure.tgt Thu Apr 5 11:30:08 2001 @@ -26,6 +26,7 @@ strongarm*) gdb_target_cpu=arm ;; xscale*) gdb_target_cpu=arm ;; v850*) gdb_target_cpu=v850 ;; +x86_64*) gdb_target_cpu=i386 ;; *) gdb_target_cpu=$target_cpu ;; esac @@ -307,6 +308,8 @@ z8k-*-coff*) gdb_target=z8k ;; +x86_64-*-linux*) gdb_target=x86_64 + configdirs="${configdirs} gdbserver" ;; esac -- Jiri Smid --------------------------------------------------------------------- SuSE CR, s.r.o. e-mail: smid@suse.cz Drahobejlova 27 tel:+420 2 83095 373 190 00 Praha 9 fax:+420 2 83095 374 Ceska republika http://www.suse.cz