[Bug ports/14595] New: memset is broken on powerpc 405

["jgunthorpe at gmail dot com" <sourceware-bugzilla@sourceware.org>]

http://sourceware.org/bugzilla/show_bug.cgi?id=14595

             Bug #: 14595
           Summary: memset is broken on powerpc 405
           Product: glibc
           Version: 2.17
            Status: NEW
          Severity: critical
          Priority: P2
         Component: ports
        AssignedTo: unassigned@sourceware.org
        ReportedBy: jgunthorpe@gmail.com
                CC: carlos@systemhalted.org, roland@gnu.org
    Classification: Unclassified


Created attachment 6638
  --> http://sourceware.org/bugzilla/attachment.cgi?id=6638
fixed memset

The use_dcbz path in the hand coded assembly is assuming a 128 byte clear size
for dcbz, but dcbz uses the cache line size and 405 cores only have a 32 byte
cache line. So any clears to 0 that use the dcbz path fail to work.

Some high end PPC's have a 128 byte cache line, but all 405's are 32 byte,
see arch/powerpc/kernel/cputable.c, dcache_bsize assignments. This value
flows from the kernel to glibc's __cache_line_size value which drives
the dcbz step in the generic memset.

Attached is a patch.

Seen while testing on a 405GP.

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