[Bug dynamic-link/15128] dynamic loader may clobber floating-point parameters on AArch64

["cvs-commit at gcc dot gnu.org" <sourceware-bugzilla@sourceware.org>]

https://sourceware.org/bugzilla/show_bug.cgi?id=15128

--- Comment #36 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> ---
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "GNU C Library master sources".

The branch, hjl/plt/master has been created
        at  5875f918319701615f59eb6d1162751fed5f7067 (commit)

- Log -----------------------------------------------------------------
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=5875f918319701615f59eb6d1162751fed5f7067

commit 5875f918319701615f59eb6d1162751fed5f7067
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Sun Aug 2 22:27:47 2015 -0700

    Don't run tst-getpid2 with LD_BIND_NOW=1

    Since _dl_x86_64_save_sse and _dl_x86_64_restore_sse are removed now,
    we don't need to run tst-getpid2 with LD_BIND_NOW=1.

        * sysdeps/unix/sysv/linux/Makefile (tst-getpid2-ENV): Removed.

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=c3a09b3f8b092450c047d5eb2bd087860e60aab7

commit c3a09b3f8b092450c047d5eb2bd087860e60aab7
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jul 29 04:49:38 2015 -0700

    Use SSE optimized strcmp in x86-64 ld.so

    Since ld.so preserves vector registers now, we can SSE optimized strcmp
    in x86-64 ld.so.

        * sysdeps/x86_64/strcmp.S: Remove "#if !IS_IN (libc)".

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=6ca39160819603e0ce06ec59afe7c39fef3889c7

commit 6ca39160819603e0ce06ec59afe7c39fef3889c7
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jul 29 03:56:14 2015 -0700

    Remove x86-64 rtld-xxx.c and rtld-xxx.S

    Since ld.so preserves vector registers now, we can use the regular,
    non-ifunc string and memory functions in ld.so.

        * sysdeps/x86_64/rtld-memcmp.c: Removed.
        * sysdeps/x86_64/rtld-memset.S: Likewise.
        * sysdeps/x86_64/rtld-strchr.S: Likewise.
        * sysdeps/x86_64/rtld-strlen.S: Likewise.
        * sysdeps/x86_64/multiarch/rtld-memcmp.c: Likewise.
        * sysdeps/x86_64/multiarch/rtld-memset.S: Likewise.

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=af5de6b2a5115629627618d9863814342740da8a

commit af5de6b2a5115629627618d9863814342740da8a
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jul 29 03:47:54 2015 -0700

    Replace %xmm8 with %xmm0

    Since ld.so preserves vector registers now, we can use %xmm0 to avoid
    the REX prefix.

        * sysdeps/x86_64/memset.S: Replace %xmm8 with %xmm0.

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=11a59bde269f34d786995a5738387fd1c4c1b2a9

commit 11a59bde269f34d786995a5738387fd1c4c1b2a9
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jul 29 03:44:39 2015 -0700

    Replace %xmm[8-12] with %xmm[0-4]

    Since ld.so preserves vector registers now, we can use %xmm[0-4] to
    avoid the REX prefix.

        * sysdeps/x86_64/strlen.S: Replace %xmm[8-12] with %xmm[0-4].

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=920994edb1efee963e5d8db86f6cc8493b0335d9

commit 920994edb1efee963e5d8db86f6cc8493b0335d9
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Jul 28 18:56:18 2015 -0700

    Don't disable SSE in x86-64 ld.so

    Since ld.so preserves vector registers now, we can use SSE in ld.so.

        * sysdeps/i386/Makefile [$(subdir) == elf] (CFLAGS-.os): Add
        -mno-sse -mno-mmx for $(all-rtld-routines).
        [$(subdir) == elf] (tests-special): Add
        $(objpfx)tst-ld-sse-use.out.
        [$(subdir) == elf] ($(objpfx)tst-ld-sse-use.out): New rule.
        * sysdeps/x86/Makefile [$(subdir) == elf] (CFLAGS-.os): Removed.
        [$(subdir) == elf] (tests-special): Likewise.
        [$(subdir) == elf] ($(objpfx)tst-ld-sse-use.out): Likewise.
        * sysdeps/x86_64/Makefile [$(subdir) == elf] (CFLAGS-.os): Add
        -mno-mmx for $(all-rtld-routines).

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=0d27ac711991ca4a2583a6570b15fa2a83de73c3

commit 0d27ac711991ca4a2583a6570b15fa2a83de73c3
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Sat Jul 11 13:25:25 2015 -0700

    Save and restore vector registers in x86-64 ld.so

    This patch adds SSE, AVX and AVX512 versions of _dl_runtime_resolve
    and _dl_runtime_profile, which save and restore the first 8 vector
    registers used for parameter passing.  elf_machine_runtime_setup
    selects the proper _dl_runtime_resolve or _dl_runtime_profile based
    on _dl_x86_cpu_features.  It avoids race condition caused by
    FOREIGN_CALL macros, which are only used for x86-64.

    Performance impact of saving and restoring 8 vector registers are
    negligible on Nehalem, Sandy Bridge, Ivy Bridge and Haswell when
    ld.so is optimized with SSE2.

        [BZ #15128]
        * sysdeps/x86_64/Makefile [$(subdir) == elf] (tests): Add
        ifuncmain8.
        (modules-names): Add ifuncmod8.
        ($(objpfx)ifuncmain8): New rule.
        * sysdeps/x86_64/dl-machine.h: Include <dl-procinfo.h> and
        <cpuid.h>.
        (elf_machine_runtime_setup): Use _dl_runtime_resolve_sse,
        _dl_runtime_resolve_avx, or _dl_runtime_resolve_avx512,
        _dl_runtime_profile_sse, _dl_runtime_profile_avx, or
        _dl_runtime_profile_avx512, based on HAS_ARCH_FEATURE.
        * sysdeps/x86_64/dl-trampoline.S: Rewrite.
        * sysdeps/x86_64/dl-trampoline.h: Likewise.
        * sysdeps/x86_64/ifuncmain8.c: New file.
        * sysdeps/x86_64/ifuncmod8.c: Likewise.
        * sysdeps/x86_64/nptl/tcb-offsets.sym (RTLD_SAVESPACE_SSE):
        Removed.
        * sysdeps/x86_64/nptl/tls.h (__128bits): Removed.
        (tcbhead_t): Change rtld_must_xmm_save to __glibc_unused1.
        Change rtld_savespace_sse to __glibc_unused2.
        (RTLD_CHECK_FOREIGN_CALL): Removed.
        (RTLD_ENABLE_FOREIGN_CALL): Likewise.
        (RTLD_PREPARE_FOREIGN_CALL): Likewise.
        (RTLD_FINALIZE_FOREIGN_CALL): Likewise.

-----------------------------------------------------------------------

-- 
You are receiving this mail because:
You are on the CC list for the bug.