From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4185 invoked by alias); 3 Aug 2015 17:21:12 -0000 Mailing-List: contact glibc-bugs-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: glibc-bugs-owner@sourceware.org Received: (qmail 3637 invoked by uid 55); 3 Aug 2015 17:21:03 -0000 From: "cvs-commit at gcc dot gnu.org" To: glibc-bugs@sourceware.org Subject: [Bug dynamic-link/15128] dynamic loader may clobber floating-point parameters on AArch64 Date: Mon, 03 Aug 2015 17:21:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: glibc X-Bugzilla-Component: dynamic-link X-Bugzilla-Version: 2.17 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: RESOLVED X-Bugzilla-Resolution: FIXED X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at sourceware dot org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: security- X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://sourceware.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-08/txt/msg00035.txt.bz2 https://sourceware.org/bugzilla/show_bug.cgi?id=15128 --- Comment #27 from cvs-commit at gcc dot gnu.org --- This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "GNU C Library master sources". The branch, hjl/plt/master has been created at 5b5763b34b5c12c1c41315f0e823660d8bd5c698 (commit) - Log ----------------------------------------------------------------- https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=5b5763b34b5c12c1c41315f0e823660d8bd5c698 commit 5b5763b34b5c12c1c41315f0e823660d8bd5c698 Author: H.J. Lu Date: Mon Aug 3 08:00:40 2015 -0700 Rename init-arch.c to dl-get-cpu-features.c Add testcases for __get_cpu_features https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=83cf75b556f9b8dcbd95541a276ee9dfc5761c4f commit 83cf75b556f9b8dcbd95541a276ee9dfc5761c4f Author: H.J. Lu Date: Sun Aug 2 22:27:47 2015 -0700 Don't run tst-getpid2 with LD_BIND_NOW=1 Since _dl_x86_64_save_sse and _dl_x86_64_restore_sse are removed now, we don't need to run tst-getpid2 with LD_BIND_NOW=1. * sysdeps/unix/sysv/linux/Makefile (tst-getpid2-ENV): Removed. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=708f2aac905ea757bcb6ff23532b6ccfc406236f commit 708f2aac905ea757bcb6ff23532b6ccfc406236f Author: H.J. Lu Date: Wed Jul 29 04:49:38 2015 -0700 Use SSE optimized strcmp in x86-64 ld.so Since ld.so preserves vector registers now, we can SSE optimized strcmp in x86-64 ld.so. * sysdeps/x86_64/strcmp.S: Remove "#if !IS_IN (libc)". https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=26d4813c6a5bfda63b578f83670f236cbf1c13fe commit 26d4813c6a5bfda63b578f83670f236cbf1c13fe Author: H.J. Lu Date: Wed Jul 29 03:56:14 2015 -0700 Remove x86-64 rtld-xxx.c and rtld-xxx.S Since ld.so preserves vector registers now, we can use the regular, non-ifunc string and memory functions in ld.so. * sysdeps/x86_64/rtld-memcmp.c: Removed. * sysdeps/x86_64/rtld-memset.S: Likewise. * sysdeps/x86_64/rtld-strchr.S: Likewise. * sysdeps/x86_64/rtld-strlen.S: Likewise. * sysdeps/x86_64/multiarch/rtld-memcmp.c: Likewise. * sysdeps/x86_64/multiarch/rtld-memset.S: Likewise. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=3f2511ec570058d78256d4a9523285a4089b7ed9 commit 3f2511ec570058d78256d4a9523285a4089b7ed9 Author: H.J. Lu Date: Wed Jul 29 03:47:54 2015 -0700 Replace %xmm8 with %xmm0 Since ld.so preserves vector registers now, we can use %xmm0 to avoid the REX prefix. * sysdeps/x86_64/memset.S: Replace %xmm8 with %xmm0. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=a83593af1006873abd1e26ea944f6cf09f072e28 commit a83593af1006873abd1e26ea944f6cf09f072e28 Author: H.J. Lu Date: Wed Jul 29 03:44:39 2015 -0700 Replace %xmm[8-12] with %xmm[0-4] Since ld.so preserves vector registers now, we can use %xmm[0-4] to avoid the REX prefix. * sysdeps/x86_64/strlen.S: Replace %xmm[8-12] with %xmm[0-4]. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=b16fbdf77f3d815e19673478f32556ac8baf7d86 commit b16fbdf77f3d815e19673478f32556ac8baf7d86 Author: H.J. Lu Date: Tue Jul 28 18:56:18 2015 -0700 Don't disable SSE in x86-64 ld.so Since ld.so preserves vector registers now, we can use SSE in ld.so. * sysdeps/i386/Makefile [$(subdir) == elf] (CFLAGS-.os): Add -mno-sse -mno-mmx for $(all-rtld-routines). [$(subdir) == elf] (tests-special): Add $(objpfx)tst-ld-sse-use.out. [$(subdir) == elf] ($(objpfx)tst-ld-sse-use.out): New rule. * sysdeps/x86/Makefile [$(subdir) == elf] (CFLAGS-.os): Removed. [$(subdir) == elf] (tests-special): Likewise. [$(subdir) == elf] ($(objpfx)tst-ld-sse-use.out): Likewise. * sysdeps/x86_64/Makefile [$(subdir) == elf] (CFLAGS-.os): Add -mno-mmx for $(all-rtld-routines). https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=442f3d779f4b711045eb48a8fc78016d57a9d760 commit 442f3d779f4b711045eb48a8fc78016d57a9d760 Author: H.J. Lu Date: Sat Jul 11 13:25:25 2015 -0700 Save and restore vector registers in x86-64 ld.so This patch initiaizes GLRO(dl_x86_xstate) in dl_platform_init to indicate if the processor supports SSE, AVX or AVX512. It uses this information to properly save and restore vector registers in ld.so. Now we can use SSE in ld.so and delete FOREIGN_CALL macros. [BZ #15128] * sysdeps/x86_64/Makefile [$(subdir) == elf] (tests): Add ifuncmain8. (modules-names): Add ifuncmod8. ($(objpfx)ifuncmain8): New rule. * sysdeps/x86_64/dl-machine.h: Include and . (elf_machine_runtime_setup): Use _dl_runtime_resolve_sse, _dl_runtime_resolve_avx, or _dl_runtime_resolve_avx512, _dl_runtime_profile_sse, _dl_runtime_profile_avx, or _dl_runtime_profile_avx512, based on HAS_ARCH_FEATURE. * sysdeps/x86_64/dl-trampoline.S: Rewrite. * sysdeps/x86_64/dl-trampoline.h: Likewise. * sysdeps/x86_64/ifuncmain8.c: New file. * sysdeps/x86_64/ifuncmod8.c: Likewise. * sysdeps/x86_64/nptl/tcb-offsets.sym (RTLD_SAVESPACE_SSE): Removed. * sysdeps/x86_64/nptl/tls.h (__128bits): Removed. (tcbhead_t): Change rtld_must_xmm_save to __glibc_unused1. Change rtld_savespace_sse to __glibc_unused2. (RTLD_CHECK_FOREIGN_CALL): Removed. (RTLD_ENABLE_FOREIGN_CALL): Likewise. (RTLD_PREPARE_FOREIGN_CALL): Likewise. (RTLD_FINALIZE_FOREIGN_CALL): Likewise. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=1ca5bb347ba585e3393c654cebac0c015a08d47b commit 1ca5bb347ba585e3393c654cebac0c015a08d47b Author: H.J. Lu Date: Sun Jul 12 14:41:20 2015 -0700 Align stack when calling __errno_location We should align stack to 16 bytes when calling __errno_location. [BZ #18661] * sysdeps/x86_64/fpu/s_cosf.S (__cosf): Align stack to 16 bytes when calling __errno_location. * sysdeps/x86_64/fpu/s_sincosf.S (__sincosf): Likewise. * sysdeps/x86_64/fpu/s_sinf.S (__sinf): Likewise. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=9fe5cccab58b5cbaf3bcec3e9154413f3330c849 commit 9fe5cccab58b5cbaf3bcec3e9154413f3330c849 Author: H.J. Lu Date: Sun Jul 12 14:40:25 2015 -0700 Align stack to 16 bytes when calling __gettimeofday Subtract stack by 24 bytes instead of 16 bytes so that stack is aligned to 16 bytes when calling __gettimeofday. [BZ #18661] * sysdeps/unix/sysv/linux/x86_64/lowlevellock.S (__lll_timedwait_tid): Align stack to 16 bytes when calling __gettimeofday. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=e5180480fda8fb740d5a02eb6ecbe25ff82214d4 commit e5180480fda8fb740d5a02eb6ecbe25ff82214d4 Author: H.J. Lu Date: Sun Jul 12 14:38:58 2015 -0700 Align stack to 16 bytes when calling __setcontext Don't use pop to restore %rdi so that stack is aligned to 16 bytes when calling __setcontext. [BZ #18661] * sysdeps/unix/sysv/linux/x86_64/__start_context.S (__start_context): Don't use pop to restore %rdi so that stack is aligned to 16 bytes when calling __setcontext. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=a691de50e047732d8ed7c010f8a456d67d071789 commit a691de50e047732d8ed7c010f8a456d67d071789 Author: H.J. Lu Date: Wed Jul 29 03:41:58 2015 -0700 Compile {memcpy,strcmp}-sse2-unaligned.S only for libc {memcpy,strcmp}-sse2-unaligned.S aren't needed in ld.so. * sysdeps/x86_64/multiarch/memcpy-sse2-unaligned.S: Compile only for libc. * sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S: Likewise. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=686d22be135392def2b1d2018195cac67bd19208 commit 686d22be135392def2b1d2018195cac67bd19208 Author: H.J. Lu Date: Sat Aug 1 07:47:16 2015 -0700 Update x86 elision-conf.c for This patch updates x86 elision-conf.c to use the newly defined HAS_CPU_FEATURE from . * sysdeps/unix/sysv/linux/x86/elision-conf.c (elision_init): Replace HAS_RTM with HAS_CPU_FEATURE (RTM). https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=3d98f487d18379acd39c4a1db38bd192b4a9beab commit 3d98f487d18379acd39c4a1db38bd192b4a9beab Author: H.J. Lu Date: Fri Jul 31 13:46:05 2015 -0700 Update libmvec multiarch functions for This patch updates libmvec multiarch functions to use the newly defined HAS_CPU_FEATURE, HAS_ARCH_FEATURE and LOAD_RTLD_GLOBAL_RO_RDX from . * math/Makefile ($(addprefix $(objpfx), $(libm-vec-tests))): Remove $(objpfx)init-arch.o. * sysdeps/x86_64/fpu/Makefile (libmvec-support): Remove init-arch. * sysdeps/x86_64/fpu/math-tests-arch.h (avx_usable): Removed. (INIT_ARCH_EXT): Defined as empty. (CHECK_ARCH_EXT): Replace HAS_XXX with HAS_ARCH_FEATURE (XXX). * sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S: Remove __init_cpu_features call. Replace HAS_XXX with HAS_CPU_FEATURE/HAS_ARCH_FEATURE (XXX). * sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S: Likewise. ----------------------------------------------------------------------- -- You are receiving this mail because: You are on the CC list for the bug.