From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 306 invoked by alias); 5 Aug 2015 14:34:41 -0000 Mailing-List: contact glibc-bugs-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: glibc-bugs-owner@sourceware.org Received: (qmail 130279 invoked by uid 55); 5 Aug 2015 14:34:34 -0000 From: "cvs-commit at gcc dot gnu.org" To: glibc-bugs@sourceware.org Subject: [Bug dynamic-link/15128] dynamic loader may clobber floating-point parameters on AArch64 Date: Wed, 05 Aug 2015 14:34:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: glibc X-Bugzilla-Component: dynamic-link X-Bugzilla-Version: 2.17 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: RESOLVED X-Bugzilla-Resolution: FIXED X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at sourceware dot org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: security- X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://sourceware.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-08/txt/msg00198.txt.bz2 https://sourceware.org/bugzilla/show_bug.cgi?id=15128 --- Comment #31 from cvs-commit at gcc dot gnu.org --- This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "GNU C Library master sources". The branch, hjl/plt/master has been created at 32cf01e21b3e2ae1b556298560b0d1f323bb5a59 (commit) - Log ----------------------------------------------------------------- https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=32cf01e21b3e2ae1b556298560b0d1f323bb5a59 commit 32cf01e21b3e2ae1b556298560b0d1f323bb5a59 Author: H.J. Lu Date: Sun Aug 2 22:27:47 2015 -0700 Don't run tst-getpid2 with LD_BIND_NOW=1 Since _dl_x86_64_save_sse and _dl_x86_64_restore_sse are removed now, we don't need to run tst-getpid2 with LD_BIND_NOW=1. * sysdeps/unix/sysv/linux/Makefile (tst-getpid2-ENV): Removed. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=496b058c3d1f1644c215d2d915b2360d936acd96 commit 496b058c3d1f1644c215d2d915b2360d936acd96 Author: H.J. Lu Date: Wed Jul 29 04:49:38 2015 -0700 Use SSE optimized strcmp in x86-64 ld.so Since ld.so preserves vector registers now, we can SSE optimized strcmp in x86-64 ld.so. * sysdeps/x86_64/strcmp.S: Remove "#if !IS_IN (libc)". https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=5f7b31aa9ebab6da65993c8ad25023905d821882 commit 5f7b31aa9ebab6da65993c8ad25023905d821882 Author: H.J. Lu Date: Wed Jul 29 03:56:14 2015 -0700 Remove x86-64 rtld-xxx.c and rtld-xxx.S Since ld.so preserves vector registers now, we can use the regular, non-ifunc string and memory functions in ld.so. * sysdeps/x86_64/rtld-memcmp.c: Removed. * sysdeps/x86_64/rtld-memset.S: Likewise. * sysdeps/x86_64/rtld-strchr.S: Likewise. * sysdeps/x86_64/rtld-strlen.S: Likewise. * sysdeps/x86_64/multiarch/rtld-memcmp.c: Likewise. * sysdeps/x86_64/multiarch/rtld-memset.S: Likewise. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=34d03e94a95059eea62b5100da53f1efd61ab5c9 commit 34d03e94a95059eea62b5100da53f1efd61ab5c9 Author: H.J. Lu Date: Wed Jul 29 03:47:54 2015 -0700 Replace %xmm8 with %xmm0 Since ld.so preserves vector registers now, we can use %xmm0 to avoid the REX prefix. * sysdeps/x86_64/memset.S: Replace %xmm8 with %xmm0. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=6c64dfd045f681e54884b3fac5e0b5a76a9d0830 commit 6c64dfd045f681e54884b3fac5e0b5a76a9d0830 Author: H.J. Lu Date: Wed Jul 29 03:44:39 2015 -0700 Replace %xmm[8-12] with %xmm[0-4] Since ld.so preserves vector registers now, we can use %xmm[0-4] to avoid the REX prefix. * sysdeps/x86_64/strlen.S: Replace %xmm[8-12] with %xmm[0-4]. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=cabe3118d5bc5345593efcc53929de830188129f commit cabe3118d5bc5345593efcc53929de830188129f Author: H.J. Lu Date: Tue Jul 28 18:56:18 2015 -0700 Don't disable SSE in x86-64 ld.so Since ld.so preserves vector registers now, we can use SSE in ld.so. * sysdeps/i386/Makefile [$(subdir) == elf] (CFLAGS-.os): Add -mno-sse -mno-mmx for $(all-rtld-routines). [$(subdir) == elf] (tests-special): Add $(objpfx)tst-ld-sse-use.out. [$(subdir) == elf] ($(objpfx)tst-ld-sse-use.out): New rule. * sysdeps/x86/Makefile [$(subdir) == elf] (CFLAGS-.os): Removed. [$(subdir) == elf] (tests-special): Likewise. [$(subdir) == elf] ($(objpfx)tst-ld-sse-use.out): Likewise. * sysdeps/x86_64/Makefile [$(subdir) == elf] (CFLAGS-.os): Add -mno-mmx for $(all-rtld-routines). https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=7ee3280ac9282410773e778b1e117d9bf21e86ef commit 7ee3280ac9282410773e778b1e117d9bf21e86ef Author: H.J. Lu Date: Sat Jul 11 13:25:25 2015 -0700 Save and restore vector registers in x86-64 ld.so This patch initiaizes GLRO(dl_x86_xstate) in dl_platform_init to indicate if the processor supports SSE, AVX or AVX512. It uses this information to properly save and restore vector registers in ld.so. Now we can use SSE in ld.so and delete FOREIGN_CALL macros. [BZ #15128] * sysdeps/x86_64/Makefile [$(subdir) == elf] (tests): Add ifuncmain8. (modules-names): Add ifuncmod8. ($(objpfx)ifuncmain8): New rule. * sysdeps/x86_64/dl-machine.h: Include and . (elf_machine_runtime_setup): Use _dl_runtime_resolve_sse, _dl_runtime_resolve_avx, or _dl_runtime_resolve_avx512, _dl_runtime_profile_sse, _dl_runtime_profile_avx, or _dl_runtime_profile_avx512, based on HAS_ARCH_FEATURE. * sysdeps/x86_64/dl-trampoline.S: Rewrite. * sysdeps/x86_64/dl-trampoline.h: Likewise. * sysdeps/x86_64/ifuncmain8.c: New file. * sysdeps/x86_64/ifuncmod8.c: Likewise. * sysdeps/x86_64/nptl/tcb-offsets.sym (RTLD_SAVESPACE_SSE): Removed. * sysdeps/x86_64/nptl/tls.h (__128bits): Removed. (tcbhead_t): Change rtld_must_xmm_save to __glibc_unused1. Change rtld_savespace_sse to __glibc_unused2. (RTLD_CHECK_FOREIGN_CALL): Removed. (RTLD_ENABLE_FOREIGN_CALL): Likewise. (RTLD_PREPARE_FOREIGN_CALL): Likewise. (RTLD_FINALIZE_FOREIGN_CALL): Likewise. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=7fd87aec8be5056a68330cf1f2d6d65d0bf31f51 commit 7fd87aec8be5056a68330cf1f2d6d65d0bf31f51 Author: H.J. Lu Date: Sun Jul 12 14:41:20 2015 -0700 Align stack when calling __errno_location We should align stack to 16 bytes when calling __errno_location. [BZ #18661] * sysdeps/x86_64/fpu/s_cosf.S (__cosf): Align stack to 16 bytes when calling __errno_location. * sysdeps/x86_64/fpu/s_sincosf.S (__sincosf): Likewise. * sysdeps/x86_64/fpu/s_sinf.S (__sinf): Likewise. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=fd7e3e782325e79dc0bb43654e98d430caa9862c commit fd7e3e782325e79dc0bb43654e98d430caa9862c Author: H.J. Lu Date: Sun Jul 12 14:40:25 2015 -0700 Align stack to 16 bytes when calling __gettimeofday Subtract stack by 24 bytes instead of 16 bytes so that stack is aligned to 16 bytes when calling __gettimeofday. [BZ #18661] * sysdeps/unix/sysv/linux/x86_64/lowlevellock.S (__lll_timedwait_tid): Align stack to 16 bytes when calling __gettimeofday. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=2dc2d93a96a3bbfe6c8fab30d98e9563987815b2 commit 2dc2d93a96a3bbfe6c8fab30d98e9563987815b2 Author: H.J. Lu Date: Sun Jul 12 14:38:58 2015 -0700 Align stack to 16 bytes when calling __setcontext Don't use pop to restore %rdi so that stack is aligned to 16 bytes when calling __setcontext. [BZ #18661] * sysdeps/unix/sysv/linux/x86_64/__start_context.S (__start_context): Don't use pop to restore %rdi so that stack is aligned to 16 bytes when calling __setcontext. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=ea2954e76744fbf14f40dfdc2fe81787e3997870 commit ea2954e76744fbf14f40dfdc2fe81787e3997870 Author: H.J. Lu Date: Wed Jul 29 03:41:58 2015 -0700 Compile {memcpy,strcmp}-sse2-unaligned.S only for libc {memcpy,strcmp}-sse2-unaligned.S aren't needed in ld.so. * sysdeps/x86_64/multiarch/memcpy-sse2-unaligned.S: Compile only for libc. * sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S: Likewise. https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=0e70fc24701004b4f4c357ce8ac72a0baa2d59e2 commit 0e70fc24701004b4f4c357ce8ac72a0baa2d59e2 Author: H.J. Lu Date: Sat Aug 1 07:47:16 2015 -0700 Update x86 elision-conf.c for This patch updates x86 elision-conf.c to use the newly defined HAS_CPU_FEATURE from . * sysdeps/unix/sysv/linux/x86/elision-conf.c (elision_init): Replace HAS_RTM with HAS_CPU_FEATURE (RTM). https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=74394f4b3cf92cfcedec7347327dd1e327eb30dd commit 74394f4b3cf92cfcedec7347327dd1e327eb30dd Author: H.J. Lu Date: Fri Jul 31 13:46:05 2015 -0700 Update libmvec multiarch functions for This patch updates libmvec multiarch functions to use the newly defined HAS_CPU_FEATURE, HAS_ARCH_FEATURE and LOAD_RTLD_GLOBAL_RO_RDX from . * math/Makefile ($(addprefix $(objpfx), $(libm-vec-tests))): Remove $(objpfx)init-arch.o. * sysdeps/x86_64/fpu/Makefile (libmvec-support): Remove init-arch. * sysdeps/x86_64/fpu/math-tests-arch.h (avx_usable): Removed. (INIT_ARCH_EXT): Defined as empty. (CHECK_ARCH_EXT): Replace HAS_XXX with HAS_ARCH_FEATURE (XXX). * sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S: Remove __init_cpu_features call. Replace HAS_XXX with HAS_CPU_FEATURE/HAS_ARCH_FEATURE (XXX). * sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S: Likewise. * sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S: Likewise. ----------------------------------------------------------------------- -- You are receiving this mail because: You are on the CC list for the bug.