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From: "cedric.bail at free dot fr" <sourceware-bugzilla@sourceware.org>
To: glibc-bugs@sourceware.org
Subject: [Bug nptl/17351] New: No hardware with functional lock elision available
Date: Fri, 05 Sep 2014 12:12:00 -0000 [thread overview]
Message-ID: <bug-17351-131@http.sourceware.org/bugzilla/> (raw)
https://sourceware.org/bugzilla/show_bug.cgi?id=17351
Bug ID: 17351
Summary: No hardware with functional lock elision available
Product: glibc
Version: unspecified
Status: NEW
Severity: normal
Priority: P2
Component: nptl
Assignee: unassigned at sourceware dot org
Reporter: cedric.bail at free dot fr
CC: drepper.fsp at gmail dot com
Intel has found an issue in the lock elision micro code and is rolling out a
microcode that disable it apparently for older haswell.
http://techreport.com/news/26911/errata-prompts-intel-to-disable-tsx-in-haswell-early-broadwell-cpus
http://anandtech.com/show/8376/intel-disables-tsx-instructions-erratum-found-in-haswell-haswelleep-broadwell
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-e3-1200v3-spec-update.pdf
People who did not update their microcode will have some weird/random issue
most likely when using a glibc build with elision. Arch Linux has concluded it
is not a software bug and it doesn't require to change their packaging
(https://bugs.archlinux.org/task/39631).
Please advise what is the proper solution to this problem, as it potentially
affect a lot of people who wont know where the problem come from.
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next reply other threads:[~2014-09-05 12:12 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-05 12:12 cedric.bail at free dot fr [this message]
2014-09-05 17:28 ` [Bug nptl/17351] " cedric.bail at free dot fr
2014-09-05 17:42 ` carlos at redhat dot com
2014-09-06 9:19 ` cedric.bail at free dot fr
2014-09-06 17:35 ` carlos at redhat dot com
2014-09-06 19:36 ` cedric.bail at free dot fr
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