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Subject: [Bug libc/25824] Abnormal function of strnlen in aarch64
Date: Fri, 17 Jul 2020 14:07:57 +0000
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https://sourceware.org/bugzilla/show_bug.cgi?id=3D25824

--- Comment #8 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gn=
u.org> ---
The master branch has been updated by Wilco Dijkstra <wilco@sourceware.org>:

https://sourceware.org/git/gitweb.cgi?p=3Dglibc.git;h=3Df46ef33ad134bec7ac9=
92f28ee4b8b0614590e3e

commit f46ef33ad134bec7ac992f28ee4b8b0614590e3e
Author: Wilco Dijkstra <wdijkstr@arm.com>
Date:   Fri Jul 17 14:09:36 2020 +0100

    AArch64: Improve strlen_asimd performance (bug 25824)

    Optimize strlen using a mix of scalar and SIMD code.  On modern micro
    architectures large strings are 2.6 times faster than existing
    strlen_asimd and 35% faster than the new MTE version of strlen.

    On a random strlen benchmark using small sizes the speedup is 7% vs
    strlen_asimd and 40% vs the MTE strlen.  This fixes the main strlen
    regressions on Cortex-A53 and other cores with a simple Neon unit.

    Rename __strlen_generic to __strlen_mte, and select strlen_asimd when
    MTE is not enabled (this is waiting on support for a HWCAP_MTE bit).

    This fixes big-endian bug 25824. Passes GLIBC regression tests.

    Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>

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