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From: "adhemerval.zanella at linaro dot org" <sourceware-bugzilla@sourceware.org> To: glibc-bugs@sourceware.org Subject: [Bug libc/27824] preadv2 and pwritev2 offset argument passing on 64bit targets Date: Tue, 04 May 2021 17:29:35 +0000 [thread overview] Message-ID: <bug-27824-131-dLyrkA4UgO@http.sourceware.org/bugzilla/> (raw) In-Reply-To: <bug-27824-131@http.sourceware.org/bugzilla/> https://sourceware.org/bugzilla/show_bug.cgi?id=27824 Adhemerval Zanella <adhemerval.zanella at linaro dot org> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |adhemerval.zanella at linaro dot o | |rg --- Comment #2 from Adhemerval Zanella <adhemerval.zanella at linaro dot org> --- The preadv2/pwritev2 for x32 is slight different than the other architectures: i686 and x86_64 uses sys_pwritev2 entrypoint while x32 uses *compat_sys_pwritev64v2*: | asmlinkage long compat_sys_pwritev64v2(unsigned long fd, | const struct iovec __user *vec, | unsigned long vlen, loff_t pos, rwf_t flags); So x32 does require a specific LO_HI_LONG macro. However for other architecture I do think this is really and issue, the kernel entrypoints are defined. | SYSCALL_DEFINE6(preadv2, unsigned long, fd, const struct iovec __user *, vec, | unsigned long, vlen, unsigned long, pos_l, unsigned long, pos_h, | rwf_t, flags) | COMPAT_SYSCALL_DEFINE6(preadv2, compat_ulong_t, fd, | const struct iovec __user *, vec, | compat_ulong_t, vlen, u32, pos_low, u32, pos_high, | rwf_t, flags) So both do accept a pos_low, but it does make sense only for architectures where sizeof (unsigned long) < sizeof (off_t). Maybe by using: | #ifdef __WORDSIZE == 32 | # define LO_HI_LONG(val) \ | (unsigned long int) (val), (unsinged long int) (((uint64_t) (val) >> 32)) | #else | # define LO_HI_LONG(val) \ | (unsigned long int) (val), 0 | #endif It should cover all cases of compat and default usage, including mips64n32. x32 will need to continue use its own definition (since it defines __ASSUME_WORDSIZE64_ILP32). -- You are receiving this mail because: You are on the CC list for the bug.
prev parent reply other threads:[~2021-05-04 17:29 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-04 14:56 [Bug libc/27824] New: " nsz at gcc dot gnu.org 2021-05-04 15:21 ` [Bug libc/27824] " schwab@linux-m68k.org 2021-05-04 17:29 ` adhemerval.zanella at linaro dot org [this message]
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