From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id DF9FE3855027; Tue, 10 Aug 2021 02:10:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DF9FE3855027 From: "wangxuszcn at foxmail dot com" To: glibc-bugs@sourceware.org Subject: [Bug string/28214] New: [suggestion] using stnp instead of stp in memset of aarch64 Date: Tue, 10 Aug 2021 02:10:22 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: glibc X-Bugzilla-Component: string X-Bugzilla-Version: unspecified X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: wangxuszcn at foxmail dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at sourceware dot org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone attachments.created Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://sourceware.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: glibc-bugs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Glibc-bugs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Aug 2021 02:10:23 -0000 https://sourceware.org/bugzilla/show_bug.cgi?id=3D28214 Bug ID: 28214 Summary: [suggestion] using stnp instead of stp in memset of aarch64 Product: glibc Version: unspecified Status: UNCONFIRMED Severity: enhancement Priority: P2 Component: string Assignee: unassigned at sourceware dot org Reporter: wangxuszcn at foxmail dot com Target Milestone: --- Created attachment 13608 --> https://sourceware.org/bugzilla/attachment.cgi?id=3D13608&action=3Ded= it memset_change_stp_to_stnp in aarch64 Generally, after the memset is called to perform initialization, the destination address is not used immediately, suggest that using stnp instea= d of stp in memset of aarch64. Background Knowledge: The ARM v8-A architecture provides load/store non-temporal pair instructions (LDNP/STNP) that provide a hint to the memory system that an access is non-temporal or streaming, and unlikely to be repeated in the near future. diff --git a/sysdeps/aarch64/memset.S b/sysdeps/aarch64/memset.S index 9067ea2..83bae2f 100644 --- a/sysdeps/aarch64/memset.S +++ b/sysdeps/aarch64/memset.S @@ -74,8 +74,8 @@ L(set_medium): 32 bytes from the end. */ L(set96): str q0, [dstin, 16] - stp q0, q0, [dstin, 32] - stp q0, q0, [dstend, -32] + stnp q0, q0, [dstin, 32] + stnp q0, q0, [dstend, -32] ret .p2align 3 @@ -91,13 +91,13 @@ L(no_zva): sub count, dstend, dst /* Count is 16 too large. */ sub dst, dst, 16 /* Dst is biased by -32. */ sub count, count, 64 + 16 /* Adjust count and bias for loop. = */ -1: stp q0, q0, [dst, 32] - stp q0, q0, [dst, 64]! +1: stnp q0, q0, [dst, 32] + stnp q0, q0, [dst, 64]! L(tail64): subs count, count, 64 b.hi 1b -2: stp q0, q0, [dstend, -64] - stp q0, q0, [dstend, -32] +2: stnp q0, q0, [dstend, -64] + stnp q0, q0, [dstend, -32] ret L(try_zva): @@ -116,10 +116,10 @@ L(try_zva): */ L(zva_64): str q0, [dst, 16] - stp q0, q0, [dst, 32] + stnp q0, q0, [dst, 32] bic dst, dst, 63 - stp q0, q0, [dst, 64] - stp q0, q0, [dst, 96] + stnp q0, q0, [dst, 64] + stnp q0, q0, [dst, 96] sub count, dstend, dst /* Count is now 128 too large. */ sub count, count, 128+64+64 /* Adjust count and bias for loop. = */ add dst, dst, 128 @@ -128,10 +128,10 @@ L(zva_64): add dst, dst, 64 subs count, count, 64 b.hi 1b - stp q0, q0, [dst, 0] - stp q0, q0, [dst, 32] - stp q0, q0, [dstend, -64] - stp q0, q0, [dstend, -32] + stnp q0, q0, [dst, 0] + stnp q0, q0, [dst, 32] + stnp q0, q0, [dstend, -64] + stnp q0, q0, [dstend, -32] ret .p2align 3 @@ -140,9 +140,9 @@ L(zva_128): b.ne L(zva_other) str q0, [dst, 16] - stp q0, q0, [dst, 32] - stp q0, q0, [dst, 64] - stp q0, q0, [dst, 96] + stnp q0, q0, [dst, 32] + stnp q0, q0, [dst, 64] + stnp q0, q0, [dst, 96] bic dst, dst, 127 sub count, dstend, dst /* Count is now 128 too large. */ sub count, count, 128+128 /* Adjust count and bias for loop. = */ @@ -151,10 +151,10 @@ L(zva_128): add dst, dst, 128 subs count, count, 128 b.hi 1b - stp q0, q0, [dstend, -128] - stp q0, q0, [dstend, -96] - stp q0, q0, [dstend, -64] - stp q0, q0, [dstend, -32] + stnp q0, q0, [dstend, -128] + stnp q0, q0, [dstend, -96] + stnp q0, q0, [dstend, -64] + stnp q0, q0, [dstend, -32] ret L(zva_other): @@ -170,8 +170,8 @@ L(zva_other): subs count, tmp1, dst /* Actual alignment bytes to write.= */ bic tmp1, tmp1, tmp2 /* Aligned dc zva start address. */ beq 2f -1: stp q0, q0, [dst], 64 - stp q0, q0, [dst, -32] +1: stnp q0, q0, [dst], 64 + stnp q0, q0, [dst, -32] subs count, count, 64 b.hi 1b 2: mov dst, tmp1 --=20 You are receiving this mail because: You are on the CC list for the bug.=