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From: "wdijkstr at arm dot com" <sourceware-bugzilla@sourceware.org>
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Subject: [Bug libc/28432] Aarch64 memcpy used on device-memory
Date: Wed, 13 Oct 2021 12:36:35 +0000
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https://sourceware.org/bugzilla/show_bug.cgi?id=3D28432

Wilco <wdijkstr at arm dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |wdijkstr at arm dot com

--- Comment #2 from Wilco <wdijkstr at arm dot com> ---
(In reply to Jon Nettleton from comment #0)

> This does fix the issue I was trying to solve in both my specific test ca=
se
> as well as a few real world rendering failures.  Since we are only
> re-ordering stp's there should be no functional or performance regression=
s,
> and all the glibc test's do pass.

It's not clear what the underlying issue is, but I don't believe reordering
stores would be sufficient - it might depend on alignment, state of the
writebuffer, cache miss/hit and many other factors that software can't cont=
rol.

So my first question is whether this works around the issue 100%, ie. for a=
ll
possible combinations of src and dst alignment, overlap (for memmove) and
sizes?

--=20
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