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From: "archicharmer at mail dot ru" <sourceware-bugzilla@sourceware.org>
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Subject: [Bug ports/28872] Building glibc for MIPSel single float targets
Date: Thu, 10 Feb 2022 19:45:39 +0000
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https://sourceware.org/bugzilla/show_bug.cgi?id=3D28872

Den <archicharmer at mail dot ru> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |INVALID
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #10 from Den <archicharmer at mail dot ru> ---
(In reply to Adhemerval Zanella from comment #9)
> I am trying to understand which options you use with gcc to target this
> chip,=20
> -mabi=3D32 -march=3Dmips2 -mhard-float -msingle-float -mfp32
That's correct. -march=3Dr6000 but yes it is mips2 anyway.

> seems to use
> 'sw/lw' to
> load store doubles.
I do not think that if to replace all of the s.d/l.d to sw/lw respectively =
will
do the trick.

Let's summarize.
There is no way to somehow split a doubleword to a two words and vice versa
conversion/uniting;
An extra ABI is required to be specified as to be thought-out. No one will =
be
handling that because of it's rarity; even if the processor itself, it's mo=
del,
is not rare;
Most of the programs compiled basely on glibc with my patch are providing a
SegFault, invalid write access. Patch is a waste, it's conception is wrong.

Verdicts are:
patch is not worth to be accepated, even to be existing;
glibc can not be built for MIPSel targets with single float only;
thread closed;
invalid (to be as a) bug request.

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