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From: "archicharmer at mail dot ru" <sourceware-bugzilla@sourceware.org>
To: glibc-bugs@sourceware.org
Subject: [Bug ports/28872] Building glibc for MIPSel single float targets
Date: Sat, 19 Feb 2022 08:27:47 +0000	[thread overview]
Message-ID: <bug-28872-131-J42fu24g8G@http.sourceware.org/bugzilla/> (raw)
In-Reply-To: <bug-28872-131@http.sourceware.org/bugzilla/>

https://sourceware.org/bugzilla/show_bug.cgi?id=28872

--- Comment #15 from Den <archicharmer at mail dot ru> ---
(In reply to Adhemerval Zanella from comment #14)

Zanella, thank you for your support.

> In fact it does exactly what I suggested ... on comment #5.

Well, your patches here just replaces l.d to ldc1 and s.d to sdc1, but as I
replied to your comment#5, the opcodes sdc1/ldc1 (the almost same load/store
double but from/to coprocessor1) are not supported for single float targets as
well. What about lwc1/swc1 and BYTES_PER_WORD? - doubles will not be doubles
after those instructions, right?

By the way, you made a mistake in setjmp_aux.c (s.d and sdc1 instead of l.d and
ldc1). Moreover, the files.c (at least them) can not be compiled when there are
such presentations of LDFPR/STFPR inside asm volatiles. I suppose you just
showed a quick realization.

> $ mips64-linux-gnu/bin/mips64-glibc-linux-gnu-gcc -mabi=32 -mips2
> -mhard-float -mfpxx t.c -o t

Please, while tests, additionally use flag -msingle-float and/or -mfp32 instead
of -mfpxx

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  parent reply	other threads:[~2022-02-19  8:27 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-08 11:27 [Bug ports/28872] New: " archicharmer at mail dot ru
2022-02-08 17:55 ` [Bug ports/28872] " joseph at codesourcery dot com
2022-02-08 19:19 ` archicharmer at mail dot ru
2022-02-08 19:34 ` joseph at codesourcery dot com
2022-02-09  3:41 ` archicharmer at mail dot ru
2022-02-09 14:16 ` adhemerval.zanella at linaro dot org
2022-02-09 17:03 ` archicharmer at mail dot ru
2022-02-09 17:33 ` adhemerval.zanella at linaro dot org
2022-02-10  2:43 ` archicharmer at mail dot ru
2022-02-10 11:25 ` adhemerval.zanella at linaro dot org
2022-02-10 19:45 ` archicharmer at mail dot ru
2022-02-10 20:57 ` adhemerval.zanella at linaro dot org
2022-02-11  3:54 ` archicharmer at mail dot ru
2022-02-17 17:09 ` archicharmer at mail dot ru
2022-02-18 12:39 ` adhemerval.zanella at linaro dot org
2022-02-19  8:27 ` archicharmer at mail dot ru [this message]
2022-02-22 20:05 ` adhemerval.zanella at linaro dot org
2022-02-23  8:06 ` archicharmer at mail dot ru
2022-02-23 11:57 ` adhemerval.zanella at linaro dot org
2022-02-23 11:57 ` adhemerval.zanella at linaro dot org
2022-03-05 17:43 ` archicharmer at mail dot ru
2022-03-07 11:07 ` adhemerval.zanella at linaro dot org
2022-03-07 16:17 ` archicharmer at mail dot ru
2022-03-07 16:59 ` adhemerval.zanella at linaro dot org
2022-03-18 15:01 ` archicharmer at mail dot ru

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