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From: "archicharmer at mail dot ru" <sourceware-bugzilla@sourceware.org>
To: glibc-bugs@sourceware.org
Subject: [Bug ports/28872] Building glibc for MIPSel single float targets
Date: Wed, 09 Feb 2022 03:41:40 +0000	[thread overview]
Message-ID: <bug-28872-131-Sox5wsSnaG@http.sourceware.org/bugzilla/> (raw)
In-Reply-To: <bug-28872-131@http.sourceware.org/bugzilla/>

https://sourceware.org/bugzilla/show_bug.cgi?id=28872

--- Comment #4 from Den <archicharmer at mail dot ru> ---
> But are double-precision values passed in exactly the same way as when 
> building for a processor supporting double-precision in hardware, so that 
> objects built for double-precision hardware could run against a shared 
> libm built for single-precision hardware, passing double values to the 
> libm functions that take double arguments and getting double return values 
> from them, as long as this is run in double-precision hardware, for 
> example?
> processors with only single-precision float in hardware 
> have double-precision registers and double-precision loads and stores, so 
> there is no separate single-precision ABI.  Though such processors aren't 
> actually relevant for glibc because they aren't 'A' variant.)
Double precision are emulating by GCC. For example, it "melts" opcode s.d (8)
into a two sdc1 (4+4). But in case when there are assembler inlines with
unsupported opcodes set exactly in them then, of course, the compiler will be
rumbling.
The question is not to thought-out a whole line of rewritting the glibc
building for a single float abi, neither to create the special abi. There are
exact files are failing to be compiled because of their assembler inlines with
an unsupported opcodes set directly. Let everything will be with double
precision as it is, but is there a way to rewrite these assembler inlines
corectly so it can be compiled with the supported opcodes?
That is not r5900 specific issue. If to build a cross compiler for r6000 with
setting it have no double float, then it appears here too. r6000 have double
precision either the related opcodes, but the omission of the -mdoobule-float
flag sets such opcodes like s.d,l.d and sqrt.d unsupported.

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  parent reply	other threads:[~2022-02-09  3:41 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-08 11:27 [Bug ports/28872] New: " archicharmer at mail dot ru
2022-02-08 17:55 ` [Bug ports/28872] " joseph at codesourcery dot com
2022-02-08 19:19 ` archicharmer at mail dot ru
2022-02-08 19:34 ` joseph at codesourcery dot com
2022-02-09  3:41 ` archicharmer at mail dot ru [this message]
2022-02-09 14:16 ` adhemerval.zanella at linaro dot org
2022-02-09 17:03 ` archicharmer at mail dot ru
2022-02-09 17:33 ` adhemerval.zanella at linaro dot org
2022-02-10  2:43 ` archicharmer at mail dot ru
2022-02-10 11:25 ` adhemerval.zanella at linaro dot org
2022-02-10 19:45 ` archicharmer at mail dot ru
2022-02-10 20:57 ` adhemerval.zanella at linaro dot org
2022-02-11  3:54 ` archicharmer at mail dot ru
2022-02-17 17:09 ` archicharmer at mail dot ru
2022-02-18 12:39 ` adhemerval.zanella at linaro dot org
2022-02-19  8:27 ` archicharmer at mail dot ru
2022-02-22 20:05 ` adhemerval.zanella at linaro dot org
2022-02-23  8:06 ` archicharmer at mail dot ru
2022-02-23 11:57 ` adhemerval.zanella at linaro dot org
2022-02-23 11:57 ` adhemerval.zanella at linaro dot org
2022-03-05 17:43 ` archicharmer at mail dot ru
2022-03-07 11:07 ` adhemerval.zanella at linaro dot org
2022-03-07 16:17 ` archicharmer at mail dot ru
2022-03-07 16:59 ` adhemerval.zanella at linaro dot org
2022-03-18 15:01 ` archicharmer at mail dot ru

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