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From: "engelke at in dot tum.de" <sourceware-bugzilla@sourceware.org>
To: glibc-bugs@sourceware.org
Subject: [Bug dynamic-link/29953] New: Invalid x86_non_temporal_threshold
 without cache info
Date: Mon, 02 Jan 2023 17:33:37 +0000
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X-Bugzilla-Product: glibc
X-Bugzilla-Component: dynamic-link
X-Bugzilla-Version: 2.36
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X-Bugzilla-Severity: minor
X-Bugzilla-Who: engelke at in dot tum.de
X-Bugzilla-Status: UNCONFIRMED
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X-Bugzilla-Priority: P2
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https://sourceware.org/bugzilla/show_bug.cgi?id=3D29953

            Bug ID: 29953
           Summary: Invalid x86_non_temporal_threshold without cache info
           Product: glibc
           Version: 2.36
            Status: UNCONFIRMED
          Severity: minor
          Priority: P2
         Component: dynamic-link
          Assignee: unassigned at sourceware dot org
          Reporter: engelke at in dot tum.de
                CC: hjl.tools at gmail dot com
  Target Milestone: ---

When cpuid reports no information on a shared cache (e.g., in an emulator),=
 the
x86_non_temporal_threshold will be set to zero, causing memcpy/memset to be=
have
wrong for mid-sized operations. sysdeps/x86/dl-cacheinfo.h indicates that t=
he
minimum value must be 0x4040, but this is not enforced for the default value
(see also commit b446822b6ae).

In the emulator, `/lib64/ld-linux-x86-64.so.2 --list-tunables` reports:

    glibc.cpu.x86_non_temporal_threshold: 0x0 (min: 0x0, max:
0xffffffffffffffff)

Setting the tunable explicitly (env
GLIBC_TUNABLES=3Dglibc.cpu.x86_non_temporal_threshold=3D0x4040) avoids the =
problem.

As a side note, ld.so won't load any DSO on x86-64 ("CPU ISA level is lower
than required") when the cpuid vendor not listed in sysdeps/x86/cpu-feature=
s.c,
as the feature bits in cpuid leaf 1 are not decoded in get_common_indices
(family is NULL).

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