[glibc] powerpc: Eliminate UP macro conditionals

[glibc] powerpc: Eliminate UP macro conditionals

[Florian Weimer]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=d5c4cce9c3eb82cb57d01a3ce3a0999e146abd63

commit d5c4cce9c3eb82cb57d01a3ce3a0999e146abd63
Author: Florian Weimer <fweimer@redhat.com>
Date:   Fri Nov 13 15:19:41 2020 +0100

    powerpc: Eliminate UP macro conditionals
    
    The macro is never defined.
    
    Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>

Diff:
---
 sysdeps/powerpc/atomic-machine.h           | 11 +++--------
 sysdeps/powerpc/powerpc32/atomic-machine.h |  4 +---
 sysdeps/powerpc/powerpc64/atomic-machine.h |  4 +---
 3 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/sysdeps/powerpc/atomic-machine.h b/sysdeps/powerpc/atomic-machine.h
index bd357a44a6..4feb21532f 100644
--- a/sysdeps/powerpc/atomic-machine.h
+++ b/sysdeps/powerpc/atomic-machine.h
@@ -53,14 +53,9 @@ typedef uintmax_t uatomic_max_t;
 #define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
   (abort (), 0)
 
-#ifdef UP
-# define __ARCH_ACQ_INSTR	""
-# define __ARCH_REL_INSTR	""
-#else
-# define __ARCH_ACQ_INSTR	"isync"
-# ifndef __ARCH_REL_INSTR
-#  define __ARCH_REL_INSTR	"sync"
-# endif
+#define __ARCH_ACQ_INSTR	"isync"
+#ifndef __ARCH_REL_INSTR
+# define __ARCH_REL_INSTR	"sync"
 #endif
 
 #ifndef MUTEX_HINT_ACQ
diff --git a/sysdeps/powerpc/powerpc32/atomic-machine.h b/sysdeps/powerpc/powerpc32/atomic-machine.h
index 61c794991c..066759d097 100644
--- a/sysdeps/powerpc/powerpc32/atomic-machine.h
+++ b/sysdeps/powerpc/powerpc32/atomic-machine.h
@@ -105,9 +105,7 @@
 /*
  * "light weight" sync can also be used for the release barrier.
  */
-# ifndef UP
-#  define __ARCH_REL_INSTR	"lwsync"
-# endif
+# define __ARCH_REL_INSTR	"lwsync"
 # define atomic_write_barrier()	__asm ("lwsync" ::: "memory")
 #else
 /*
diff --git a/sysdeps/powerpc/powerpc64/atomic-machine.h b/sysdeps/powerpc/powerpc64/atomic-machine.h
index 421dbd10c4..c9372a8e9e 100644
--- a/sysdeps/powerpc/powerpc64/atomic-machine.h
+++ b/sysdeps/powerpc/powerpc64/atomic-machine.h
@@ -230,9 +230,7 @@
 /*
  * "light weight" sync can also be used for the release barrier.
  */
-#ifndef UP
-# define __ARCH_REL_INSTR	"lwsync"
-#endif
+#define __ARCH_REL_INSTR	"lwsync"
 #define atomic_write_barrier()	__asm ("lwsync" ::: "memory")
 
 /*