[glibc] [powerpc] Tighten contraints for asm constant parameters

[Paul Clarke <pc@sourceware.org>]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=9fea0f1a2a6e4f7946505c358ab99ea3ab846274

commit 9fea0f1a2a6e4f7946505c358ab99ea3ab846274
Author: Paul A. Clarke <pc@us.ibm.com>
Date:   Tue Oct 19 09:49:12 2021 -0500

    [powerpc] Tighten contraints for asm constant parameters
    
    There are a few places where only known numeric values are acceptable for
    `asm` parameters, yet the constraint "i" is used.  "i" can include
    "symbolic constants whose values will be known only at assembly time or
    later."
    
    Use "n" instead of "i" where known numeric values are required.
    
    Suggested-by: Segher Boessenkool <segher@kernel.crashing.org>
    Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>

Diff:
---
 sysdeps/powerpc/fpu/fenv_libc.h  | 8 ++++----
 sysdeps/powerpc/test-get_hwcap.c | 8 ++++----
 sysdeps/powerpc/tst-tlsifunc.c   | 2 +-
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index dc35b9dbe0..a04fb928ca 100644
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -73,7 +73,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
     if (__builtin_constant_p (rn))					\
       __asm__ __volatile__ (						\
         ".machine push; .machine \"power9\"; mffscrni %0,%1; .machine pop" \
-        : "=f" (__fr.fenv) : "i" (rn));					\
+        : "=f" (__fr.fenv) : "n" (rn));					\
     else								\
     {									\
       __fr.l = (rn);							\
@@ -135,8 +135,8 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
 /* Set/clear a particular FPSCR bit (for instance,
    reset_fpscr_bit(FPSCR_VE);
    prevents INVALID exceptions from being raised).  */
-#define set_fpscr_bit(x) asm volatile ("mtfsb1 %0" : : "i"(x))
-#define reset_fpscr_bit(x) asm volatile ("mtfsb0 %0" : : "i"(x))
+#define set_fpscr_bit(x) asm volatile ("mtfsb1 %0" : : "n"(x))
+#define reset_fpscr_bit(x) asm volatile ("mtfsb0 %0" : : "n"(x))
 
 typedef union
 {
@@ -184,7 +184,7 @@ __fesetround_inline_nocheck (const int round)
   if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))
     __fe_mffscrn (round);
   else
-    asm volatile ("mtfsfi 7,%0" : : "i" (round));
+    asm volatile ("mtfsfi 7,%0" : : "n" (round));
 #endif
 }
 
diff --git a/sysdeps/powerpc/test-get_hwcap.c b/sysdeps/powerpc/test-get_hwcap.c
index b5cef93cdd..a64b630807 100644
--- a/sysdeps/powerpc/test-get_hwcap.c
+++ b/sysdeps/powerpc/test-get_hwcap.c
@@ -63,16 +63,16 @@ uint64_t check_tcbhwcap (long tid)
 #ifdef __powerpc64__
   __asm__  ("ld %0,%1(%2)\n"
 	    : "=r" (tcb_hwcap)
-	    : "i" (__HWCAPOFF), "b" (__tp));
+	    : "n" (__HWCAPOFF), "b" (__tp));
 #else
   uint64_t h1, h2;
 
   __asm__ ("lwz %0,%1(%2)\n"
       : "=r" (h1)
-      : "i" (__HWCAPOFF), "b" (__tp));
+      : "n" (__HWCAPOFF), "b" (__tp));
   __asm__ ("lwz %0,%1(%2)\n"
       : "=r" (h2)
-      : "i" (__HWCAP2OFF), "b" (__tp));
+      : "n" (__HWCAP2OFF), "b" (__tp));
   tcb_hwcap = (h1 >> 32) << 32 | (h2 >> 32);
 #endif
 
@@ -117,7 +117,7 @@ uint64_t check_tcbhwcap (long tid)
   /* Same test for the platform number.  */
   __asm__  ("lwz %0,%1(%2)\n"
 	    : "=r" (tcb_at_platform)
-	    : "i" (__ATPLATOFF), "b" (__tp));
+	    : "n" (__ATPLATOFF), "b" (__tp));
 
   at_platform_string = (const char *) getauxval (AT_PLATFORM);
   at_platform = _dl_string_platform (at_platform_string);
diff --git a/sysdeps/powerpc/tst-tlsifunc.c b/sysdeps/powerpc/tst-tlsifunc.c
index c8c0bada45..f2eaf11bb4 100644
--- a/sysdeps/powerpc/tst-tlsifunc.c
+++ b/sysdeps/powerpc/tst-tlsifunc.c
@@ -49,7 +49,7 @@ get_platform (void)
 
   __asm__  ("lwz %0,%1(%2)\n"
 	    : "=r" (tmp)
-	    : "i" (__ATPLATOFF), "b" (tp));
+	    : "n" (__ATPLATOFF), "b" (tp));
 
   return tmp;
 }