From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7852) id EE6C43857805; Tue, 8 Mar 2022 05:45:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EE6C43857805 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Sunil Pandey To: glibc-cvs@sourceware.org Subject: [glibc] x86_64: Fix svml_s_atanf4_core_sse4.S code formatting X-Act-Checkin: glibc X-Git-Author: Sunil K Pandey X-Git-Refname: refs/heads/master X-Git-Oldrev: 67a8f9b86fa0f265bf67674e557b4ccaea81accb X-Git-Newrev: 9712f5c1c99caa275cb20b415ffcc8bd0dfb0f2a Message-Id: <20220308054525.EE6C43857805@sourceware.org> Date: Tue, 8 Mar 2022 05:45:25 +0000 (GMT) X-BeenThere: glibc-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Glibc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 08 Mar 2022 05:45:26 -0000 https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=9712f5c1c99caa275cb20b415ffcc8bd0dfb0f2a commit 9712f5c1c99caa275cb20b415ffcc8bd0dfb0f2a Author: Sunil K Pandey Date: Mon Mar 7 10:47:09 2022 -0800 x86_64: Fix svml_s_atanf4_core_sse4.S code formatting This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein Diff: --- .../x86_64/fpu/multiarch/svml_s_atanf4_core_sse4.S | 229 ++++++++++----------- 1 file changed, 114 insertions(+), 115 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_atanf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_atanf4_core_sse4.S index 0faf622a34..83cecb8ee5 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_atanf4_core_sse4.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_atanf4_core_sse4.S @@ -30,135 +30,134 @@ /* Offsets for data table __svml_satan_data_internal */ -#define _sSIGN_MASK 0 -#define _sABS_MASK 16 -#define _sONE 32 -#define _sPIO2 48 -#define _sPC8 64 -#define _sPC7 80 -#define _sPC6 96 -#define _sPC5 112 -#define _sPC4 128 -#define _sPC3 144 -#define _sPC2 160 -#define _sPC1 176 -#define _sPC0 192 +#define _sSIGN_MASK 0 +#define _sABS_MASK 16 +#define _sONE 32 +#define _sPIO2 48 +#define _sPC8 64 +#define _sPC7 80 +#define _sPC6 96 +#define _sPC5 112 +#define _sPC4 128 +#define _sPC3 144 +#define _sPC2 160 +#define _sPC1 176 +#define _sPC0 192 #include - .text - .section .text.sse4,"ax",@progbits + .section .text.sse4, "ax", @progbits ENTRY(_ZGVbN4v_atanf_sse4) -/* - * To use minps\maxps operations for argument reduction - * uncomment _AT_USEMINMAX_ definition - * Declarations - * Variables - * Constants - */ - movups _sABS_MASK+__svml_satan_data_internal(%rip), %xmm2 + /* + * To use minps\maxps operations for argument reduction + * uncomment _AT_USEMINMAX_ definition + * Declarations + * Variables + * Constants + */ + movups _sABS_MASK+__svml_satan_data_internal(%rip), %xmm2 -/* - * 1) If x>1, then r=-1/x, PIO2=Pi/2 - * 2) If -1<=x<=1, then r=x, PIO2=0 - * 3) If x<-1, then r=-1/x, PIO2=-Pi/2 - */ - movups _sONE+__svml_satan_data_internal(%rip), %xmm1 - andps %xmm0, %xmm2 - movaps %xmm2, %xmm9 - movaps %xmm1, %xmm3 - cmpleps %xmm1, %xmm9 - maxps %xmm2, %xmm3 - minps %xmm2, %xmm1 - divps %xmm3, %xmm1 - movups __svml_satan_data_internal(%rip), %xmm4 - movaps %xmm9, %xmm10 - andps %xmm4, %xmm0 - andnps %xmm4, %xmm9 - pxor %xmm0, %xmm9 - pxor %xmm1, %xmm9 + /* + * 1) If x>1, then r=-1/x, PIO2=Pi/2 + * 2) If -1<=x<=1, then r=x, PIO2=0 + * 3) If x<-1, then r=-1/x, PIO2=-Pi/2 + */ + movups _sONE+__svml_satan_data_internal(%rip), %xmm1 + andps %xmm0, %xmm2 + movaps %xmm2, %xmm9 + movaps %xmm1, %xmm3 + cmpleps %xmm1, %xmm9 + maxps %xmm2, %xmm3 + minps %xmm2, %xmm1 + divps %xmm3, %xmm1 + movups __svml_satan_data_internal(%rip), %xmm4 + movaps %xmm9, %xmm10 + andps %xmm4, %xmm0 + andnps %xmm4, %xmm9 + pxor %xmm0, %xmm9 + pxor %xmm1, %xmm9 -/* Polynomial. */ - movaps %xmm9, %xmm8 - mulps %xmm9, %xmm8 - movaps %xmm8, %xmm7 - mulps %xmm8, %xmm7 - movups _sPC8+__svml_satan_data_internal(%rip), %xmm6 - mulps %xmm7, %xmm6 - movups _sPC7+__svml_satan_data_internal(%rip), %xmm5 - mulps %xmm7, %xmm5 - addps _sPC6+__svml_satan_data_internal(%rip), %xmm6 - mulps %xmm7, %xmm6 - addps _sPC5+__svml_satan_data_internal(%rip), %xmm5 - mulps %xmm7, %xmm5 - addps _sPC4+__svml_satan_data_internal(%rip), %xmm6 - mulps %xmm7, %xmm6 - addps _sPC3+__svml_satan_data_internal(%rip), %xmm5 - mulps %xmm5, %xmm7 - addps _sPC2+__svml_satan_data_internal(%rip), %xmm6 - mulps %xmm8, %xmm6 - addps _sPC1+__svml_satan_data_internal(%rip), %xmm7 - andnps _sPIO2+__svml_satan_data_internal(%rip), %xmm10 - addps %xmm6, %xmm7 - mulps %xmm7, %xmm8 - pxor %xmm0, %xmm10 - addps _sPC0+__svml_satan_data_internal(%rip), %xmm8 + /* Polynomial. */ + movaps %xmm9, %xmm8 + mulps %xmm9, %xmm8 + movaps %xmm8, %xmm7 + mulps %xmm8, %xmm7 + movups _sPC8+__svml_satan_data_internal(%rip), %xmm6 + mulps %xmm7, %xmm6 + movups _sPC7+__svml_satan_data_internal(%rip), %xmm5 + mulps %xmm7, %xmm5 + addps _sPC6+__svml_satan_data_internal(%rip), %xmm6 + mulps %xmm7, %xmm6 + addps _sPC5+__svml_satan_data_internal(%rip), %xmm5 + mulps %xmm7, %xmm5 + addps _sPC4+__svml_satan_data_internal(%rip), %xmm6 + mulps %xmm7, %xmm6 + addps _sPC3+__svml_satan_data_internal(%rip), %xmm5 + mulps %xmm5, %xmm7 + addps _sPC2+__svml_satan_data_internal(%rip), %xmm6 + mulps %xmm8, %xmm6 + addps _sPC1+__svml_satan_data_internal(%rip), %xmm7 + andnps _sPIO2+__svml_satan_data_internal(%rip), %xmm10 + addps %xmm6, %xmm7 + mulps %xmm7, %xmm8 + pxor %xmm0, %xmm10 + addps _sPC0+__svml_satan_data_internal(%rip), %xmm8 -/* Reconstruction. */ - mulps %xmm8, %xmm9 - addps %xmm9, %xmm10 - movaps %xmm10, %xmm0 - ret + /* Reconstruction. */ + mulps %xmm8, %xmm9 + addps %xmm9, %xmm10 + movaps %xmm10, %xmm0 + ret END(_ZGVbN4v_atanf_sse4) - .section .rodata, "a" - .align 16 + .section .rodata, "a" + .align 16 #ifdef __svml_satan_data_internal_typedef typedef unsigned int VUINT32; typedef struct { - __declspec(align(16)) VUINT32 _sSIGN_MASK[4][1]; - __declspec(align(16)) VUINT32 _sABS_MASK[4][1]; - __declspec(align(16)) VUINT32 _sONE[4][1]; - __declspec(align(16)) VUINT32 _sPIO2[4][1]; - __declspec(align(16)) VUINT32 _sPC8[4][1]; - __declspec(align(16)) VUINT32 _sPC7[4][1]; - __declspec(align(16)) VUINT32 _sPC6[4][1]; - __declspec(align(16)) VUINT32 _sPC5[4][1]; - __declspec(align(16)) VUINT32 _sPC4[4][1]; - __declspec(align(16)) VUINT32 _sPC3[4][1]; - __declspec(align(16)) VUINT32 _sPC2[4][1]; - __declspec(align(16)) VUINT32 _sPC1[4][1]; - __declspec(align(16)) VUINT32 _sPC0[4][1]; + __declspec(align(16)) VUINT32 _sSIGN_MASK[4][1]; + __declspec(align(16)) VUINT32 _sABS_MASK[4][1]; + __declspec(align(16)) VUINT32 _sONE[4][1]; + __declspec(align(16)) VUINT32 _sPIO2[4][1]; + __declspec(align(16)) VUINT32 _sPC8[4][1]; + __declspec(align(16)) VUINT32 _sPC7[4][1]; + __declspec(align(16)) VUINT32 _sPC6[4][1]; + __declspec(align(16)) VUINT32 _sPC5[4][1]; + __declspec(align(16)) VUINT32 _sPC4[4][1]; + __declspec(align(16)) VUINT32 _sPC3[4][1]; + __declspec(align(16)) VUINT32 _sPC2[4][1]; + __declspec(align(16)) VUINT32 _sPC1[4][1]; + __declspec(align(16)) VUINT32 _sPC0[4][1]; } __svml_satan_data_internal; #endif __svml_satan_data_internal: - .long 0x80000000, 0x80000000, 0x80000000, 0x80000000 //_sSIGN_MASK - .align 16 - .long 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF //_sABS_MASK - .align 16 - .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 //_sONE - .align 16 - .long 0x3FC90FDB, 0x3FC90FDB, 0x3FC90FDB, 0x3FC90FDB //_sPIO2 - .align 16 - .long 0x3B322CC0, 0x3B322CC0, 0x3B322CC0, 0x3B322CC0 //_sPC8 - .align 16 - .long 0xBC7F2631, 0xBC7F2631, 0xBC7F2631, 0xBC7F2631 //_sPC7 - .align 16 - .long 0x3D2BC384, 0x3D2BC384, 0x3D2BC384, 0x3D2BC384 //_sPC6 - .align 16 - .long 0xBD987629, 0xBD987629, 0xBD987629, 0xBD987629 //_sPC5 - .align 16 - .long 0x3DD96474, 0x3DD96474, 0x3DD96474, 0x3DD96474 //_sPC4 - .align 16 - .long 0xBE1161F8, 0xBE1161F8, 0xBE1161F8, 0xBE1161F8 //_sPC3 - .align 16 - .long 0x3E4CB79F, 0x3E4CB79F, 0x3E4CB79F, 0x3E4CB79F //_sPC2 - .align 16 - .long 0xBEAAAA49, 0xBEAAAA49, 0xBEAAAA49, 0xBEAAAA49 //_sPC1 - .align 16 - .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 //_sPC0 - .align 16 - .type __svml_satan_data_internal,@object - .size __svml_satan_data_internal,.-__svml_satan_data_internal + .long 0x80000000, 0x80000000, 0x80000000, 0x80000000 // _sSIGN_MASK + .align 16 + .long 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF // _sABS_MASK + .align 16 + .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 // _sONE + .align 16 + .long 0x3FC90FDB, 0x3FC90FDB, 0x3FC90FDB, 0x3FC90FDB // _sPIO2 + .align 16 + .long 0x3B322CC0, 0x3B322CC0, 0x3B322CC0, 0x3B322CC0 // _sPC8 + .align 16 + .long 0xBC7F2631, 0xBC7F2631, 0xBC7F2631, 0xBC7F2631 // _sPC7 + .align 16 + .long 0x3D2BC384, 0x3D2BC384, 0x3D2BC384, 0x3D2BC384 // _sPC6 + .align 16 + .long 0xBD987629, 0xBD987629, 0xBD987629, 0xBD987629 // _sPC5 + .align 16 + .long 0x3DD96474, 0x3DD96474, 0x3DD96474, 0x3DD96474 // _sPC4 + .align 16 + .long 0xBE1161F8, 0xBE1161F8, 0xBE1161F8, 0xBE1161F8 // _sPC3 + .align 16 + .long 0x3E4CB79F, 0x3E4CB79F, 0x3E4CB79F, 0x3E4CB79F // _sPC2 + .align 16 + .long 0xBEAAAA49, 0xBEAAAA49, 0xBEAAAA49, 0xBEAAAA49 // _sPC1 + .align 16 + .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 // _sPC0 + .align 16 + .type __svml_satan_data_internal, @object + .size __svml_satan_data_internal, .-__svml_satan_data_internal