From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7852) id 436AA385803E; Tue, 8 Mar 2022 05:47:54 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 436AA385803E Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Sunil Pandey To: glibc-cvs@sourceware.org Subject: [glibc] x86_64: Fix svml_s_erff16_core_avx512.S code formatting X-Act-Checkin: glibc X-Git-Author: Sunil K Pandey X-Git-Refname: refs/heads/master X-Git-Oldrev: a92606d154c17f47416631482f2fab0d9dd4a039 X-Git-Newrev: 589a73ac7f583762960a00c6a1e20e7ec60e3b10 Message-Id: <20220308054754.436AA385803E@sourceware.org> Date: Tue, 8 Mar 2022 05:47:54 +0000 (GMT) X-BeenThere: glibc-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Glibc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 08 Mar 2022 05:47:54 -0000 https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=589a73ac7f583762960a00c6a1e20e7ec60e3b10 commit 589a73ac7f583762960a00c6a1e20e7ec60e3b10 Author: Sunil K Pandey Date: Mon Mar 7 10:47:11 2022 -0800 x86_64: Fix svml_s_erff16_core_avx512.S code formatting This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein Diff: --- .../fpu/multiarch/svml_s_erff16_core_avx512.S | 260 ++++++++++----------- 1 file changed, 129 insertions(+), 131 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_erff16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_erff16_core_avx512.S index 7b131e42fd..3bdc906ec8 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_erff16_core_avx512.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_erff16_core_avx512.S @@ -37,149 +37,147 @@ /* Offsets for data table __svml_serf_data_internal */ -#define _AbsMask 0 -#define _One 64 -#define _gf_MaxThreshold_LA 128 -#define _gf_la_poly_0 192 -#define _gf_la_poly_1 256 -#define _gf_la_poly_2 320 -#define _gf_la_poly_3 384 -#define _gf_la_poly_4 448 -#define _gf_la_poly_5 512 -#define _gf_la_poly_6 576 -#define _gf_la_poly_7 640 -#define _gf_la_poly_8 704 -#define _gf_la_poly_9 768 -#define _gf_la_poly_10 832 -#define _gf_la_poly_11 896 -#define _gf_la_poly_12 960 +#define _AbsMask 0 +#define _One 64 +#define _gf_MaxThreshold_LA 128 +#define _gf_la_poly_0 192 +#define _gf_la_poly_1 256 +#define _gf_la_poly_2 320 +#define _gf_la_poly_3 384 +#define _gf_la_poly_4 448 +#define _gf_la_poly_5 512 +#define _gf_la_poly_6 576 +#define _gf_la_poly_7 640 +#define _gf_la_poly_8 704 +#define _gf_la_poly_9 768 +#define _gf_la_poly_10 832 +#define _gf_la_poly_11 896 +#define _gf_la_poly_12 960 #include - .text - .section .text.exex512,"ax",@progbits + .section .text.exex512, "ax", @progbits ENTRY(_ZGVeN16v_erff_skx) - vmovaps %zmm0, %zmm8 - vmulps {rn-sae}, %zmm8, %zmm8, %zmm11 - vmovups _gf_la_poly_11+__svml_serf_data_internal(%rip), %zmm15 - vmovups _gf_la_poly_12+__svml_serf_data_internal(%rip), %zmm10 - vmovups _gf_la_poly_10+__svml_serf_data_internal(%rip), %zmm9 - vmovups _gf_la_poly_9+__svml_serf_data_internal(%rip), %zmm7 - vmovups _gf_la_poly_8+__svml_serf_data_internal(%rip), %zmm0 - vmovups _gf_la_poly_7+__svml_serf_data_internal(%rip), %zmm1 - vmovups _gf_la_poly_6+__svml_serf_data_internal(%rip), %zmm2 - vmovups _gf_la_poly_5+__svml_serf_data_internal(%rip), %zmm3 - vmovups _gf_la_poly_4+__svml_serf_data_internal(%rip), %zmm4 - vmovups _gf_la_poly_3+__svml_serf_data_internal(%rip), %zmm5 - vmovups _gf_la_poly_2+__svml_serf_data_internal(%rip), %zmm6 - vextractf32x8 $1, %zmm8, %ymm13 - vcvtps2pd {sae}, %ymm8, %zmm12 - vcvtps2pd {sae}, %ymm13, %zmm14 - vmulpd {rn-sae}, %zmm12, %zmm12, %zmm12 - vmulpd {rn-sae}, %zmm14, %zmm14, %zmm13 + vmovaps %zmm0, %zmm8 + vmulps {rn-sae}, %zmm8, %zmm8, %zmm11 + vmovups _gf_la_poly_11+__svml_serf_data_internal(%rip), %zmm15 + vmovups _gf_la_poly_12+__svml_serf_data_internal(%rip), %zmm10 + vmovups _gf_la_poly_10+__svml_serf_data_internal(%rip), %zmm9 + vmovups _gf_la_poly_9+__svml_serf_data_internal(%rip), %zmm7 + vmovups _gf_la_poly_8+__svml_serf_data_internal(%rip), %zmm0 + vmovups _gf_la_poly_7+__svml_serf_data_internal(%rip), %zmm1 + vmovups _gf_la_poly_6+__svml_serf_data_internal(%rip), %zmm2 + vmovups _gf_la_poly_5+__svml_serf_data_internal(%rip), %zmm3 + vmovups _gf_la_poly_4+__svml_serf_data_internal(%rip), %zmm4 + vmovups _gf_la_poly_3+__svml_serf_data_internal(%rip), %zmm5 + vmovups _gf_la_poly_2+__svml_serf_data_internal(%rip), %zmm6 + vextractf32x8 $1, %zmm8, %ymm13 + vcvtps2pd {sae}, %ymm8, %zmm12 + vcvtps2pd {sae}, %ymm13, %zmm14 + vmulpd {rn-sae}, %zmm12, %zmm12, %zmm12 + vmulpd {rn-sae}, %zmm14, %zmm14, %zmm13 -/* R = P0 + x^2*(P1 + x^2*(P2 + .... x^2*P12)); */ - vmovaps %zmm15, %zmm14 - vfmadd231pd {rn-sae}, %zmm12, %zmm10, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm10, %zmm15 - vmovups _gf_la_poly_1+__svml_serf_data_internal(%rip), %zmm10 - vfmadd213pd {rn-sae}, %zmm9, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm15, %zmm9 - vfmadd213pd {rn-sae}, %zmm7, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm9, %zmm7 - vfmadd213pd {rn-sae}, %zmm0, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm7, %zmm0 - vmovups _gf_MaxThreshold_LA+__svml_serf_data_internal(%rip), %zmm7 - vfmadd213pd {rn-sae}, %zmm1, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm0, %zmm1 - vmovups _gf_la_poly_0+__svml_serf_data_internal(%rip), %zmm0 - vcmpps $22, {sae}, %zmm11, %zmm7, %k1 - vfmadd213pd {rn-sae}, %zmm2, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm1, %zmm2 - vfmadd213pd {rn-sae}, %zmm3, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm2, %zmm3 - vfmadd213pd {rn-sae}, %zmm4, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm3, %zmm4 - vfmadd213pd {rn-sae}, %zmm5, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm4, %zmm5 - vfmadd213pd {rn-sae}, %zmm6, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm5, %zmm6 - vmovups _AbsMask+__svml_serf_data_internal(%rip), %zmm5 - vfmadd213pd {rn-sae}, %zmm10, %zmm12, %zmm14 - vfmadd231pd {rn-sae}, %zmm13, %zmm6, %zmm10 - vandnps %zmm8, %zmm5, %zmm6 - vfmadd213pd {rn-sae}, %zmm0, %zmm14, %zmm12 - vfmadd213pd {rn-sae}, %zmm0, %zmm10, %zmm13 - vorps _One+__svml_serf_data_internal(%rip), %zmm6, %zmm0 - vmulpd {rn-sae}, %zmm12, %zmm12, %zmm1 - vmulpd {rn-sae}, %zmm13, %zmm13, %zmm3 - vcvtpd2ps {rn-sae}, %zmm1, %ymm2 - vcvtpd2ps {rn-sae}, %zmm3, %ymm4 - vinsertf32x8 $1, %ymm4, %zmm2, %zmm9 + /* R = P0 + x^2*(P1 + x^2*(P2 + .... x^2*P12)); */ + vmovaps %zmm15, %zmm14 + vfmadd231pd {rn-sae}, %zmm12, %zmm10, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm10, %zmm15 + vmovups _gf_la_poly_1+__svml_serf_data_internal(%rip), %zmm10 + vfmadd213pd {rn-sae}, %zmm9, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm15, %zmm9 + vfmadd213pd {rn-sae}, %zmm7, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm9, %zmm7 + vfmadd213pd {rn-sae}, %zmm0, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm7, %zmm0 + vmovups _gf_MaxThreshold_LA+__svml_serf_data_internal(%rip), %zmm7 + vfmadd213pd {rn-sae}, %zmm1, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm0, %zmm1 + vmovups _gf_la_poly_0+__svml_serf_data_internal(%rip), %zmm0 + vcmpps $22, {sae}, %zmm11, %zmm7, %k1 + vfmadd213pd {rn-sae}, %zmm2, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm1, %zmm2 + vfmadd213pd {rn-sae}, %zmm3, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm2, %zmm3 + vfmadd213pd {rn-sae}, %zmm4, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm3, %zmm4 + vfmadd213pd {rn-sae}, %zmm5, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm4, %zmm5 + vfmadd213pd {rn-sae}, %zmm6, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm5, %zmm6 + vmovups _AbsMask+__svml_serf_data_internal(%rip), %zmm5 + vfmadd213pd {rn-sae}, %zmm10, %zmm12, %zmm14 + vfmadd231pd {rn-sae}, %zmm13, %zmm6, %zmm10 + vandnps %zmm8, %zmm5, %zmm6 + vfmadd213pd {rn-sae}, %zmm0, %zmm14, %zmm12 + vfmadd213pd {rn-sae}, %zmm0, %zmm10, %zmm13 + vorps _One+__svml_serf_data_internal(%rip), %zmm6, %zmm0 + vmulpd {rn-sae}, %zmm12, %zmm12, %zmm1 + vmulpd {rn-sae}, %zmm13, %zmm13, %zmm3 + vcvtpd2ps {rn-sae}, %zmm1, %ymm2 + vcvtpd2ps {rn-sae}, %zmm3, %ymm4 + vinsertf32x8 $1, %ymm4, %zmm2, %zmm9 -/* erf(x) = R * R * x; */ - vmulps {rn-sae}, %zmm8, %zmm9, %zmm0{%k1} - ret + /* erf(x) = R * R * x; */ + vmulps {rn-sae}, %zmm8, %zmm9, %zmm0{%k1} + ret END(_ZGVeN16v_erff_skx) - .section .rodata, "a" - .align 64 + .section .rodata, "a" + .align 64 #ifdef __svml_serf_data_internal_typedef typedef unsigned int VUINT32; -typedef struct -{ - __declspec(align(64)) VUINT32 _AbsMask[16][1]; - __declspec(align(64)) VUINT32 _One[16][1]; - __declspec(align(64)) VUINT32 _gf_MaxThreshold_LA[16][1]; - __declspec(align(64)) VUINT32 _gf_la_poly_0[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_1[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_2[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_3[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_4[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_5[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_6[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_7[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_8[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_9[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_10[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_11[8][2]; - __declspec(align(64)) VUINT32 _gf_la_poly_12[8][2]; +typedef struct { + __declspec(align(64)) VUINT32 _AbsMask[16][1]; + __declspec(align(64)) VUINT32 _One[16][1]; + __declspec(align(64)) VUINT32 _gf_MaxThreshold_LA[16][1]; + __declspec(align(64)) VUINT32 _gf_la_poly_0[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_1[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_2[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_3[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_4[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_5[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_6[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_7[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_8[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_9[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_10[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_11[8][2]; + __declspec(align(64)) VUINT32 _gf_la_poly_12[8][2]; } __svml_serf_data_internal; #endif __svml_serf_data_internal: - .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff /* _AbsMask */ - .align 64 - .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 /* _One */ - .align 64 - .long 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a /* _gf_MaxThreshold_LA */ - .align 64 - .quad 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903 /* _gf_la_poly_0 */ - .align 64 - .quad 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367 /* _gf_la_poly_1 */ - .align 64 - .quad 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b /* _gf_la_poly_2 */ - .align 64 - .quad 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc /* _gf_la_poly_3 */ - .align 64 - .quad 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392 /* _gf_la_poly_4 */ - .align 64 - .quad 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede /* _gf_la_poly_5 */ - .align 64 - .quad 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0 /* _gf_la_poly_6 */ - .align 64 - .quad 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f /* _gf_la_poly_7 */ - .align 64 - .quad 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523 /* _gf_la_poly_8 */ - .align 64 - .quad 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47 /* _gf_la_poly_9 */ - .align 64 - .quad 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03 /* _gf_la_poly_10 */ - .align 64 - .quad 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb /* _gf_la_poly_11 */ - .align 64 - .quad 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1 /* _gf_la_poly_12 */ - .align 64 - .type __svml_serf_data_internal,@object - .size __svml_serf_data_internal,.-__svml_serf_data_internal + .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff /* _AbsMask */ + .align 64 + .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 /* _One */ + .align 64 + .long 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a, 0x41558c5a /* _gf_MaxThreshold_LA */ + .align 64 + .quad 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903, 0x3ff0fefbd933b903 /* _gf_la_poly_0 */ + .align 64 + .quad 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367, 0xbfc6a948101e6367 /* _gf_la_poly_1 */ + .align 64 + .quad 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b, 0x3fa3a334ce602c6b /* _gf_la_poly_2 */ + .align 64 + .quad 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc, 0xbf799309ea0c81dc /* _gf_la_poly_3 */ + .align 64 + .quad 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392, 0x3f476df64a40e392 /* _gf_la_poly_4 */ + .align 64 + .quad 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede, 0xbf0a5216b9508ede /* _gf_la_poly_5 */ + .align 64 + .quad 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0, 0x3ea5794b95c8e8a0 /* _gf_la_poly_6 */ + .align 64 + .quad 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f, 0x3e94b6c0b485f30f /* _gf_la_poly_7 */ + .align 64 + .quad 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523, 0xbe65806ce17f0523 /* _gf_la_poly_8 */ + .align 64 + .quad 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47, 0x3e2715640470db47 /* _gf_la_poly_9 */ + .align 64 + .quad 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03, 0xbdddcb2653d80f03 /* _gf_la_poly_10 */ + .align 64 + .quad 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb, 0x3d85eadfc762d3eb /* _gf_la_poly_11 */ + .align 64 + .quad 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1, 0xbd1c668a2871f0f1 /* _gf_la_poly_12 */ + .align 64 + .type __svml_serf_data_internal, @object + .size __svml_serf_data_internal, .-__svml_serf_data_internal