From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7852) id C0A03385843A; Tue, 8 Mar 2022 06:12:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C0A03385843A Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Sunil Pandey To: glibc-cvs@sourceware.org Subject: [glibc] x86_64: Fix svml_s_log10f4_core_sse4.S code formatting X-Act-Checkin: glibc X-Git-Author: Sunil K Pandey X-Git-Refname: refs/heads/master X-Git-Oldrev: 602e584f3236fc0d6c361fb5964307901e0a01de X-Git-Newrev: fda62f29aa631fac9490b6377b1ef84f38559f70 Message-Id: <20220308061214.C0A03385843A@sourceware.org> Date: Tue, 8 Mar 2022 06:12:14 +0000 (GMT) X-BeenThere: glibc-cvs@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Glibc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 08 Mar 2022 06:12:14 -0000 https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=fda62f29aa631fac9490b6377b1ef84f38559f70 commit fda62f29aa631fac9490b6377b1ef84f38559f70 Author: Sunil K Pandey Date: Mon Mar 7 10:47:13 2022 -0800 x86_64: Fix svml_s_log10f4_core_sse4.S code formatting This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein Diff: --- .../fpu/multiarch/svml_s_log10f4_core_sse4.S | 369 ++++++++++----------- 1 file changed, 184 insertions(+), 185 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_log10f4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_log10f4_core_sse4.S index 047cb5f668..58f54d62a3 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_log10f4_core_sse4.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_log10f4_core_sse4.S @@ -29,215 +29,214 @@ /* Offsets for data table __svml_slog10_data_internal */ -#define MinNorm 0 -#define MaxNorm 16 -#define L2H 32 -#define L2L 48 -#define iBrkValue 64 -#define iOffExpoMask 80 -#define One 96 -#define sPoly 112 -#define L2 256 +#define MinNorm 0 +#define MaxNorm 16 +#define L2H 32 +#define L2L 48 +#define iBrkValue 64 +#define iOffExpoMask 80 +#define One 96 +#define sPoly 112 +#define L2 256 #include - .text - .section .text.sse4,"ax",@progbits + .section .text.sse4, "ax", @progbits ENTRY(_ZGVbN4v_log10f_sse4) - subq $72, %rsp - cfi_def_cfa_offset(80) - movaps %xmm0, %xmm1 - -/* reduction: compute r,n */ - movdqu iBrkValue+__svml_slog10_data_internal(%rip), %xmm2 - movaps %xmm0, %xmm4 - movdqu iOffExpoMask+__svml_slog10_data_internal(%rip), %xmm10 - psubd %xmm2, %xmm1 - pand %xmm1, %xmm10 - psrad $23, %xmm1 - paddd %xmm2, %xmm10 - movaps %xmm0, %xmm3 - movups sPoly+__svml_slog10_data_internal(%rip), %xmm5 - movups sPoly+32+__svml_slog10_data_internal(%rip), %xmm6 - movups sPoly+64+__svml_slog10_data_internal(%rip), %xmm7 - movups sPoly+96+__svml_slog10_data_internal(%rip), %xmm9 - cvtdq2ps %xmm1, %xmm12 - cmpltps MinNorm+__svml_slog10_data_internal(%rip), %xmm4 - cmpnleps MaxNorm+__svml_slog10_data_internal(%rip), %xmm3 - subps One+__svml_slog10_data_internal(%rip), %xmm10 - mulps %xmm10, %xmm5 - movaps %xmm10, %xmm8 - mulps %xmm10, %xmm6 - mulps %xmm10, %xmm8 - addps sPoly+16+__svml_slog10_data_internal(%rip), %xmm5 - mulps %xmm10, %xmm7 - addps sPoly+48+__svml_slog10_data_internal(%rip), %xmm6 - mulps %xmm10, %xmm9 - mulps %xmm8, %xmm5 - addps sPoly+80+__svml_slog10_data_internal(%rip), %xmm7 - addps sPoly+112+__svml_slog10_data_internal(%rip), %xmm9 - addps %xmm5, %xmm6 - mulps %xmm8, %xmm6 - orps %xmm3, %xmm4 - -/* combine and get argument value range mask */ - movmskps %xmm4, %edx - movups L2L+__svml_slog10_data_internal(%rip), %xmm1 - addps %xmm6, %xmm7 - mulps %xmm12, %xmm1 - mulps %xmm7, %xmm8 - movups L2H+__svml_slog10_data_internal(%rip), %xmm11 - addps %xmm8, %xmm9 - mulps %xmm11, %xmm12 - mulps %xmm10, %xmm9 - addps sPoly+128+__svml_slog10_data_internal(%rip), %xmm9 - mulps %xmm9, %xmm10 - addps %xmm10, %xmm1 - addps %xmm12, %xmm1 - testl %edx, %edx - -/* Go to special inputs processing branch */ - jne L(SPECIAL_VALUES_BRANCH) - # LOE rbx rbp r12 r13 r14 r15 edx xmm0 xmm1 - -/* Restore registers - * and exit the function - */ + subq $72, %rsp + cfi_def_cfa_offset(80) + movaps %xmm0, %xmm1 + + /* reduction: compute r, n */ + movdqu iBrkValue+__svml_slog10_data_internal(%rip), %xmm2 + movaps %xmm0, %xmm4 + movdqu iOffExpoMask+__svml_slog10_data_internal(%rip), %xmm10 + psubd %xmm2, %xmm1 + pand %xmm1, %xmm10 + psrad $23, %xmm1 + paddd %xmm2, %xmm10 + movaps %xmm0, %xmm3 + movups sPoly+__svml_slog10_data_internal(%rip), %xmm5 + movups sPoly+32+__svml_slog10_data_internal(%rip), %xmm6 + movups sPoly+64+__svml_slog10_data_internal(%rip), %xmm7 + movups sPoly+96+__svml_slog10_data_internal(%rip), %xmm9 + cvtdq2ps %xmm1, %xmm12 + cmpltps MinNorm+__svml_slog10_data_internal(%rip), %xmm4 + cmpnleps MaxNorm+__svml_slog10_data_internal(%rip), %xmm3 + subps One+__svml_slog10_data_internal(%rip), %xmm10 + mulps %xmm10, %xmm5 + movaps %xmm10, %xmm8 + mulps %xmm10, %xmm6 + mulps %xmm10, %xmm8 + addps sPoly+16+__svml_slog10_data_internal(%rip), %xmm5 + mulps %xmm10, %xmm7 + addps sPoly+48+__svml_slog10_data_internal(%rip), %xmm6 + mulps %xmm10, %xmm9 + mulps %xmm8, %xmm5 + addps sPoly+80+__svml_slog10_data_internal(%rip), %xmm7 + addps sPoly+112+__svml_slog10_data_internal(%rip), %xmm9 + addps %xmm5, %xmm6 + mulps %xmm8, %xmm6 + orps %xmm3, %xmm4 + + /* combine and get argument value range mask */ + movmskps %xmm4, %edx + movups L2L+__svml_slog10_data_internal(%rip), %xmm1 + addps %xmm6, %xmm7 + mulps %xmm12, %xmm1 + mulps %xmm7, %xmm8 + movups L2H+__svml_slog10_data_internal(%rip), %xmm11 + addps %xmm8, %xmm9 + mulps %xmm11, %xmm12 + mulps %xmm10, %xmm9 + addps sPoly+128+__svml_slog10_data_internal(%rip), %xmm9 + mulps %xmm9, %xmm10 + addps %xmm10, %xmm1 + addps %xmm12, %xmm1 + testl %edx, %edx + + /* Go to special inputs processing branch */ + jne L(SPECIAL_VALUES_BRANCH) + # LOE rbx rbp r12 r13 r14 r15 edx xmm0 xmm1 + + /* Restore registers + * and exit the function + */ L(EXIT): - movaps %xmm1, %xmm0 - addq $72, %rsp - cfi_def_cfa_offset(8) - ret - cfi_def_cfa_offset(80) - -/* Branch to process - * special inputs - */ + movaps %xmm1, %xmm0 + addq $72, %rsp + cfi_def_cfa_offset(8) + ret + cfi_def_cfa_offset(80) + + /* Branch to process + * special inputs + */ L(SPECIAL_VALUES_BRANCH): - movups %xmm0, 32(%rsp) - movups %xmm1, 48(%rsp) - # LOE rbx rbp r12 r13 r14 r15 edx - - xorl %eax, %eax - movq %r12, 16(%rsp) - cfi_offset(12, -64) - movl %eax, %r12d - movq %r13, 8(%rsp) - cfi_offset(13, -72) - movl %edx, %r13d - movq %r14, (%rsp) - cfi_offset(14, -80) - # LOE rbx rbp r15 r12d r13d - -/* Range mask - * bits check - */ + movups %xmm0, 32(%rsp) + movups %xmm1, 48(%rsp) + # LOE rbx rbp r12 r13 r14 r15 edx + + xorl %eax, %eax + movq %r12, 16(%rsp) + cfi_offset(12, -64) + movl %eax, %r12d + movq %r13, 8(%rsp) + cfi_offset(13, -72) + movl %edx, %r13d + movq %r14, (%rsp) + cfi_offset(14, -80) + # LOE rbx rbp r15 r12d r13d + + /* Range mask + * bits check + */ L(RANGEMASK_CHECK): - btl %r12d, %r13d + btl %r12d, %r13d -/* Call scalar math function */ - jc L(SCALAR_MATH_CALL) - # LOE rbx rbp r15 r12d r13d + /* Call scalar math function */ + jc L(SCALAR_MATH_CALL) + # LOE rbx rbp r15 r12d r13d -/* Special inputs - * processing loop - */ + /* Special inputs + * processing loop + */ L(SPECIAL_VALUES_LOOP): - incl %r12d - cmpl $4, %r12d - -/* Check bits in range mask */ - jl L(RANGEMASK_CHECK) - # LOE rbx rbp r15 r12d r13d - - movq 16(%rsp), %r12 - cfi_restore(12) - movq 8(%rsp), %r13 - cfi_restore(13) - movq (%rsp), %r14 - cfi_restore(14) - movups 48(%rsp), %xmm1 - -/* Go to exit */ - jmp L(EXIT) - cfi_offset(12, -64) - cfi_offset(13, -72) - cfi_offset(14, -80) - # LOE rbx rbp r12 r13 r14 r15 xmm1 - -/* Scalar math fucntion call - * to process special input - */ + incl %r12d + cmpl $4, %r12d + + /* Check bits in range mask */ + jl L(RANGEMASK_CHECK) + # LOE rbx rbp r15 r12d r13d + + movq 16(%rsp), %r12 + cfi_restore(12) + movq 8(%rsp), %r13 + cfi_restore(13) + movq (%rsp), %r14 + cfi_restore(14) + movups 48(%rsp), %xmm1 + + /* Go to exit */ + jmp L(EXIT) + cfi_offset(12, -64) + cfi_offset(13, -72) + cfi_offset(14, -80) + # LOE rbx rbp r12 r13 r14 r15 xmm1 + + /* Scalar math fucntion call + * to process special input + */ L(SCALAR_MATH_CALL): - movl %r12d, %r14d - movss 32(%rsp,%r14,4), %xmm0 - call log10f@PLT - # LOE rbx rbp r14 r15 r12d r13d xmm0 + movl %r12d, %r14d + movss 32(%rsp, %r14, 4), %xmm0 + call log10f@PLT + # LOE rbx rbp r14 r15 r12d r13d xmm0 - movss %xmm0, 48(%rsp,%r14,4) + movss %xmm0, 48(%rsp, %r14, 4) -/* Process special inputs in loop */ - jmp L(SPECIAL_VALUES_LOOP) - # LOE rbx rbp r15 r12d r13d + /* Process special inputs in loop */ + jmp L(SPECIAL_VALUES_LOOP) + # LOE rbx rbp r15 r12d r13d END(_ZGVbN4v_log10f_sse4) - .section .rodata, "a" - .align 16 + .section .rodata, "a" + .align 16 #ifdef __svml_slog10_data_internal_typedef typedef unsigned int VUINT32; typedef struct { - __declspec(align(16)) VUINT32 MinNorm[4][1]; - __declspec(align(16)) VUINT32 MaxNorm[4][1]; - __declspec(align(16)) VUINT32 L2H[4][1]; - __declspec(align(16)) VUINT32 L2L[4][1]; - __declspec(align(16)) VUINT32 iBrkValue[4][1]; - __declspec(align(16)) VUINT32 iOffExpoMask[4][1]; - __declspec(align(16)) VUINT32 One[4][1]; - __declspec(align(16)) VUINT32 sPoly[9][4][1]; - __declspec(align(16)) VUINT32 L2[4][1]; + __declspec(align(16)) VUINT32 MinNorm[4][1]; + __declspec(align(16)) VUINT32 MaxNorm[4][1]; + __declspec(align(16)) VUINT32 L2H[4][1]; + __declspec(align(16)) VUINT32 L2L[4][1]; + __declspec(align(16)) VUINT32 iBrkValue[4][1]; + __declspec(align(16)) VUINT32 iOffExpoMask[4][1]; + __declspec(align(16)) VUINT32 One[4][1]; + __declspec(align(16)) VUINT32 sPoly[9][4][1]; + __declspec(align(16)) VUINT32 L2[4][1]; } __svml_slog10_data_internal; #endif __svml_slog10_data_internal: - /*== MinNorm ==*/ - .long 0x00800000, 0x00800000, 0x00800000, 0x00800000 - /*== MaxNorm ==*/ - .align 16 - .long 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff - /*== L2H ==*/ - .align 16 - .long 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100 - /*== L2L ==*/ - .align 16 - .long 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600 - /*== iBrkValue = SP 2/3 ==*/ - .align 16 - .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab - /*== iOffExpoMask = SP significand mask ==*/ - .align 16 - .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff - /*== sOne = SP 1.0 ==*/ - .align 16 - .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 - /*== spoly[9] ==*/ - .align 16 - .long 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4 /* coeff9 */ - .long 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073 /* coeff8 */ - .long 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317 /* coeff7 */ - .long 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27 /* coeff6 */ - .long 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96 /* coeff5 */ - .long 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20 /* coeff4 */ - .long 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5 /* coeff3 */ - .long 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5 /* coeff2 */ - .long 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9 /* coeff1 */ - /*== L2 ==*/ - .align 16 - .long 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b - .align 16 - .type __svml_slog10_data_internal,@object - .size __svml_slog10_data_internal,.-__svml_slog10_data_internal + /* MinNorm */ + .long 0x00800000, 0x00800000, 0x00800000, 0x00800000 + /* MaxNorm */ + .align 16 + .long 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff + /* L2H */ + .align 16 + .long 0x3e9a2100, 0x3e9a2100, 0x3e9a2100, 0x3e9a2100 + /* L2L */ + .align 16 + .long 0xb64AF600, 0xb64AF600, 0xb64AF600, 0xb64AF600 + /* iBrkValue = SP 2/3 */ + .align 16 + .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab + /* iOffExpoMask = SP significand mask */ + .align 16 + .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff + /* sOne = SP 1.0 */ + .align 16 + .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000 + /* spoly[9] */ + .align 16 + .long 0x3d8063B4, 0x3d8063B4, 0x3d8063B4, 0x3d8063B4 /* coeff9 */ + .long 0xbd890073, 0xbd890073, 0xbd890073, 0xbd890073 /* coeff8 */ + .long 0x3d775317, 0x3d775317, 0x3d775317, 0x3d775317 /* coeff7 */ + .long 0xbd91FB27, 0xbd91FB27, 0xbd91FB27, 0xbd91FB27 /* coeff6 */ + .long 0x3dB20B96, 0x3dB20B96, 0x3dB20B96, 0x3dB20B96 /* coeff5 */ + .long 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20, 0xbdDE6E20 /* coeff4 */ + .long 0x3e143CE5, 0x3e143CE5, 0x3e143CE5, 0x3e143CE5 /* coeff3 */ + .long 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5, 0xbe5E5BC5 /* coeff2 */ + .long 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9, 0x3eDE5BD9 /* coeff1 */ + /* L2 */ + .align 16 + .long 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b + .align 16 + .type __svml_slog10_data_internal, @object + .size __svml_slog10_data_internal, .-__svml_slog10_data_internal