[glibc/fw/2.32-zen-memcpy-revert] Temporarily revert "x86: Optimizing memcpy for AMD Zen architecture."

[Florian Weimer <fw@sourceware.org>]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=537fc6aa6969d5612e953f40d2c4853f33bc1a76

commit 537fc6aa6969d5612e953f40d2c4853f33bc1a76
Author: Florian Weimer <fweimer@redhat.com>
Date:   Mon May 2 16:03:07 2022 +0200

    Temporarily revert "x86: Optimizing memcpy for AMD Zen architecture."
    
    This reverts commit 8813b2682e4094e43b0cf1634e99619f1b8b2c62.
    
    This commit will be backported again, this time in sequence, and more
    closely following the upstream version.

Diff:
---
 sysdeps/x86/cacheinfo.c | 20 +++-----------------
 1 file changed, 3 insertions(+), 17 deletions(-)

diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c
index 3fb4a028d8..dadec5d58f 100644
--- a/sysdeps/x86/cacheinfo.c
+++ b/sysdeps/x86/cacheinfo.c
@@ -808,7 +808,7 @@ init_cacheinfo (void)
 	      threads = 1 << ((ecx >> 12) & 0x0f);
 	    }
 
-	  if (threads == 0 || cpu_features->basic.family >= 0x17)
+	  if (threads == 0)
 	    {
 	      /* If APIC ID width is not available, use logical
 		 processor count.  */
@@ -823,22 +823,8 @@ init_cacheinfo (void)
 	  if (threads > 0)
 	    shared /= threads;
 
-	  /* Get shared cache per ccx for Zen architectures.  */
-	  if (cpu_features->basic.family >= 0x17)
-	    {
-	      unsigned int eax;
-
-	      /* Get number of threads share the L3 cache in CCX.  */
-	      __cpuid_count (0x8000001D, 0x3, eax, ebx, ecx, edx);
-
-	      unsigned int threads_per_ccx = ((eax >> 14) & 0xfff) + 1;
-	      shared *= threads_per_ccx;
-	    }
-	  else
-	    {
-	      /* Account for exclusive L2 and L3 caches.  */
-	      shared += core;
-            }
+	  /* Account for exclusive L2 and L3 caches.  */
+	  shared += core;
 	}
     }