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From: Sunil Pandey <skpgkp2@sourceware.org>
To: glibc-cvs@sourceware.org
Subject: [glibc/release/2.33/master] x86: Don't set Prefer_No_AVX512 for processors with AVX512 and AVX-VNNI
Date: Mon,  2 May 2022 21:31:31 +0000 (GMT)	[thread overview]
Message-ID: <20220502213131.20B65385742D@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=63fd074112505b4b3faf74070db8c3698fe9235c

commit 63fd074112505b4b3faf74070db8c3698fe9235c
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Mon Dec 6 07:14:12 2021 -0800

    x86: Don't set Prefer_No_AVX512 for processors with AVX512 and AVX-VNNI
    
    Don't set Prefer_No_AVX512 on processors with AVX512 and AVX-VNNI since
    they won't lower CPU frequency when ZMM load and store instructions are
    used.
    
    (cherry picked from commit ceeffe968c01b1202e482f4855cb6baf5c6cb713)

Diff:
---
 sysdeps/x86/cpu-features.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index e7dc25aaf5..42b02d1d33 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -555,8 +555,11 @@ disable_tsx:
 	  |= bit_arch_Prefer_No_VZEROUPPER;
       else
 	{
-	  cpu_features->preferred[index_arch_Prefer_No_AVX512]
-	    |= bit_arch_Prefer_No_AVX512;
+	  /* Processors with AVX512 and AVX-VNNI won't lower CPU frequency
+	     when ZMM load and store instructions are used.  */
+	  if (!CPU_FEATURES_CPU_P (cpu_features, AVX_VNNI))
+	    cpu_features->preferred[index_arch_Prefer_No_AVX512]
+	      |= bit_arch_Prefer_No_AVX512;
 
 	  /* Avoid RTM abort triggered by VZEROUPPER inside a
 	     transactionally executing RTM region.  */


                 reply	other threads:[~2022-05-02 21:31 UTC|newest]

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