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* [glibc/arm/morello/main] TODO(l_addr): cheri: in static exe initialize l_addr to a zero capability
@ 2022-08-05 19:34 Szabolcs Nagy
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From: Szabolcs Nagy @ 2022-08-05 19:34 UTC (permalink / raw)
To: glibc-cvs
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=d257d001c3f16ccc4e4692201d3c03f67a0a9b18
commit d257d001c3f16ccc4e4692201d3c03f67a0a9b18
Author: Szabolcs Nagy <szabolcs.nagy@arm.com>
Date: Thu Jun 24 13:29:19 2021 +0100
TODO(l_addr): cheri: in static exe initialize l_addr to a zero capability
The base should be 0, but also a valid capability. Initialize to a zero
capability instead of relying on AT_BASE.
TODO: this is a hack. we will need stricter bounds and possibly separate
l_addr and bounds info.
Diff:
---
elf/dl-support.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/elf/dl-support.c b/elf/dl-support.c
index 4af0b5b2ce..599efb1d08 100644
--- a/elf/dl-support.c
+++ b/elf/dl-support.c
@@ -248,6 +248,14 @@ _dl_aux_init (ElfW(auxv_t) *av)
GL(dl_sysinfo) = DL_SYSINFO_DEFAULT;
#endif
+#ifdef __CHERI_PURE_CAPABILITY__
+ /* Base is 0 in non-pie static executable, but it needs to be a valid
+ capability. Use the zero capability instead of AT_BASE. */
+ elfptr_t zerocap;
+ asm volatile ("cvtd %0,xzr" : "=r"(zerocap));
+ _dl_main_map.l_addr = zerocap;
+#endif
+
_dl_auxv = av;
dl_parse_auxv_t auxv_values;
/* Use an explicit initialization loop here because memset may not
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2022-08-05 19:34 [glibc/arm/morello/main] TODO(l_addr): cheri: in static exe initialize l_addr to a zero capability Szabolcs Nagy
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