[glibc/users/skpgkp2/2.33/master] Add LLL_MUTEX_READ_LOCK [BZ #28537]

[glibc/users/skpgkp2/2.33/master] Add LLL_MUTEX_READ_LOCK [BZ #28537]

[Sunil Pandey]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=2b5fe38920c435db3ee6d62be0212a8f6a63efef

commit 2b5fe38920c435db3ee6d62be0212a8f6a63efef
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Nov 2 18:33:07 2021 -0700

    Add LLL_MUTEX_READ_LOCK [BZ #28537]
    
    CAS instruction is expensive.  From the x86 CPU's point of view, getting
    a cache line for writing is more expensive than reading.  See Appendix
    A.2 Spinlock in:
    
    https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/xeon-lock-scaling-analysis-paper.pdf
    
    The full compare and swap will grab the cache line exclusive and cause
    excessive cache line bouncing.
    
    Add LLL_MUTEX_READ_LOCK to do an atomic load and skip CAS in spinlock
    loop if compare may fail to reduce cache line bouncing on contended locks.
    
    Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
    (cherry picked from commit d672a98a1af106bd68deb15576710cd61363f7a6)

Diff:
---
 nptl/pthread_mutex_lock.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/nptl/pthread_mutex_lock.c b/nptl/pthread_mutex_lock.c
index 0fd7467b97..ac8a472c08 100644
--- a/nptl/pthread_mutex_lock.c
+++ b/nptl/pthread_mutex_lock.c
@@ -56,6 +56,11 @@
 #define FORCE_ELISION(m, s)
 #endif
 
+#ifndef LLL_MUTEX_READ_LOCK
+# define LLL_MUTEX_READ_LOCK(mutex) \
+  atomic_load_relaxed (&(mutex)->__data.__lock)
+#endif
+
 static int __pthread_mutex_lock_full (pthread_mutex_t *mutex)
      __attribute_noinline__;
 
@@ -133,6 +138,8 @@ __pthread_mutex_lock (pthread_mutex_t *mutex)
 		  break;
 		}
 	      atomic_spin_nop ();
+	      if (LLL_MUTEX_READ_LOCK (mutex) != 0)
+		continue;
 	    }
 	  while (LLL_MUTEX_TRYLOCK (mutex) != 0);

[glibc/users/skpgkp2/2.33/master] Add LLL_MUTEX_READ_LOCK [BZ #28537]

[Sunil Pandey]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=8844d9b22dfa00675ef4f4e14ffe107a173bc068

commit 8844d9b22dfa00675ef4f4e14ffe107a173bc068
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Nov 2 18:33:07 2021 -0700

    Add LLL_MUTEX_READ_LOCK [BZ #28537]
    
    CAS instruction is expensive.  From the x86 CPU's point of view, getting
    a cache line for writing is more expensive than reading.  See Appendix
    A.2 Spinlock in:
    
    https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/xeon-lock-scaling-analysis-paper.pdf
    
    The full compare and swap will grab the cache line exclusive and cause
    excessive cache line bouncing.
    
    Add LLL_MUTEX_READ_LOCK to do an atomic load and skip CAS in spinlock
    loop if compare may fail to reduce cache line bouncing on contended locks.
    
    Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
    (cherry picked from commit d672a98a1af106bd68deb15576710cd61363f7a6)

Diff:
---
 nptl/pthread_mutex_lock.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/nptl/pthread_mutex_lock.c b/nptl/pthread_mutex_lock.c
index 0fd7467b97..ac8a472c08 100644
--- a/nptl/pthread_mutex_lock.c
+++ b/nptl/pthread_mutex_lock.c
@@ -56,6 +56,11 @@
 #define FORCE_ELISION(m, s)
 #endif
 
+#ifndef LLL_MUTEX_READ_LOCK
+# define LLL_MUTEX_READ_LOCK(mutex) \
+  atomic_load_relaxed (&(mutex)->__data.__lock)
+#endif
+
 static int __pthread_mutex_lock_full (pthread_mutex_t *mutex)
      __attribute_noinline__;
 
@@ -133,6 +138,8 @@ __pthread_mutex_lock (pthread_mutex_t *mutex)
 		  break;
 		}
 	      atomic_spin_nop ();
+	      if (LLL_MUTEX_READ_LOCK (mutex) != 0)
+		continue;
 	    }
 	  while (LLL_MUTEX_TRYLOCK (mutex) != 0);

[glibc/users/skpgkp2/2.33/master] Add LLL_MUTEX_READ_LOCK [BZ #28537]

[Sunil Pandey]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=d7d322258d123411c3c3c71408aa31fb1d9e9fe5

commit d7d322258d123411c3c3c71408aa31fb1d9e9fe5
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Nov 2 18:33:07 2021 -0700

    Add LLL_MUTEX_READ_LOCK [BZ #28537]
    
    CAS instruction is expensive.  From the x86 CPU's point of view, getting
    a cache line for writing is more expensive than reading.  See Appendix
    A.2 Spinlock in:
    
    https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/xeon-lock-scaling-analysis-paper.pdf
    
    The full compare and swap will grab the cache line exclusive and cause
    excessive cache line bouncing.
    
    Add LLL_MUTEX_READ_LOCK to do an atomic load and skip CAS in spinlock
    loop if compare may fail to reduce cache line bouncing on contended locks.
    
    Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
    (cherry picked from commit d672a98a1af106bd68deb15576710cd61363f7a6)

Diff:
---
 nptl/pthread_mutex_lock.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/nptl/pthread_mutex_lock.c b/nptl/pthread_mutex_lock.c
index 0fd7467b97..ac8a472c08 100644
--- a/nptl/pthread_mutex_lock.c
+++ b/nptl/pthread_mutex_lock.c
@@ -56,6 +56,11 @@
 #define FORCE_ELISION(m, s)
 #endif
 
+#ifndef LLL_MUTEX_READ_LOCK
+# define LLL_MUTEX_READ_LOCK(mutex) \
+  atomic_load_relaxed (&(mutex)->__data.__lock)
+#endif
+
 static int __pthread_mutex_lock_full (pthread_mutex_t *mutex)
      __attribute_noinline__;
 
@@ -133,6 +138,8 @@ __pthread_mutex_lock (pthread_mutex_t *mutex)
 		  break;
 		}
 	      atomic_spin_nop ();
+	      if (LLL_MUTEX_READ_LOCK (mutex) != 0)
+		continue;
 	    }
 	  while (LLL_MUTEX_TRYLOCK (mutex) != 0);