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From: Aurelien Jarno <aurel32@sourceware.org>
To: glibc-cvs@sourceware.org
Subject: [glibc/release/2.36/master] x86-64: Require BMI2 for AVX2 strncmp implementation
Date: Mon,  3 Oct 2022 21:51:14 +0000 (GMT)	[thread overview]
Message-ID: <20221003215114.2CDE93854155@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=29c577e0f54fe6e70ceacb3659179781c5569903

commit 29c577e0f54fe6e70ceacb3659179781c5569903
Author: Aurelien Jarno <aurelien@aurel32.net>
Date:   Mon Oct 3 23:46:11 2022 +0200

    x86-64: Require BMI2 for AVX2 strncmp implementation
    
    The AVX2 strncmp implementations uses the 'bzhi' instruction, which
    belongs to the BMI2 CPU feature.
    
    NB: It also uses the 'tzcnt' BMI1 instruction, but it is executed as BSF
    as BSF if the CPU doesn't support TZCNT, and produces the same result
    for non-zero input.
    
    Partially fixes: b77b06e0e296 ("x86: Optimize strcmp-avx2.S")
    Partially resolves: BZ #29611
    
    Reviewed-by: Noah Goldstein  <goldstein.w.n@gmail.com>
    (cherry picked from commit fc7de1d9b99ae1676bc626ddca422d7abee0eb48)

Diff:
---
 sysdeps/x86_64/multiarch/ifunc-impl-list.c | 7 +++++--
 sysdeps/x86_64/multiarch/strncmp.c         | 4 ++--
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
index a42b0a4620..aebef3daaf 100644
--- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c
+++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
@@ -1176,13 +1176,16 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
   IFUNC_IMPL (i, name, strncmp,
 	      X86_IFUNC_IMPL_ADD_V4 (array, i, strncmp,
 				     (CPU_FEATURE_USABLE (AVX512VL)
-				      && CPU_FEATURE_USABLE (AVX512BW)),
+				      && CPU_FEATURE_USABLE (AVX512BW)
+				      && CPU_FEATURE_USABLE (BMI2)),
 				     __strncmp_evex)
 	      X86_IFUNC_IMPL_ADD_V3 (array, i, strncmp,
-				     CPU_FEATURE_USABLE (AVX2),
+				     (CPU_FEATURE_USABLE (AVX2)
+				      && CPU_FEATURE_USABLE (BMI2)),
 				     __strncmp_avx2)
 	      X86_IFUNC_IMPL_ADD_V3 (array, i, strncmp,
 				     (CPU_FEATURE_USABLE (AVX2)
+				      && CPU_FEATURE_USABLE (BMI2)
 				      && CPU_FEATURE_USABLE (RTM)),
 				     __strncmp_avx2_rtm)
 	      X86_IFUNC_IMPL_ADD_V2 (array, i, strncmp,
diff --git a/sysdeps/x86_64/multiarch/strncmp.c b/sysdeps/x86_64/multiarch/strncmp.c
index 4ebe4bde30..c4f8b6bbb5 100644
--- a/sysdeps/x86_64/multiarch/strncmp.c
+++ b/sysdeps/x86_64/multiarch/strncmp.c
@@ -41,12 +41,12 @@ IFUNC_SELECTOR (void)
   const struct cpu_features *cpu_features = __get_cpu_features ();
 
   if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX2)
+      && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, BMI2)
       && X86_ISA_CPU_FEATURES_ARCH_P (cpu_features,
 				      AVX_Fast_Unaligned_Load, ))
     {
       if (X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)
-	  && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512BW)
-	  && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, BMI2))
+	  && X86_ISA_CPU_FEATURE_USABLE_P (cpu_features, AVX512BW))
 	return OPTIMIZE (evex);
 
       if (CPU_FEATURE_USABLE_P (cpu_features, RTM))

                 reply	other threads:[~2022-10-03 21:51 UTC|newest]

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