From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1778) id 291D53858D1E; Mon, 3 Oct 2022 22:04:45 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 291D53858D1E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1664834685; bh=9OkwjSxdlLLcato7wFMTF4zZS5M3USOeR6mVRb+Jj3w=; h=From:To:Subject:Date:From; b=wLSfqvAhcLoyymQmT85fHvCnCo9GnOhqCWzwbkLTO2yVa7Qmg30IjYNnHcwUqCKGl RYNQNLGPPa8feJpnOgllowUvs/ODjyw1G4dHfLmJDrl+bfcoHG3+m4UltTcis4zIB7 jethdCEODt2iHTBiB/sLppcYCov0inbNtW73OESI= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Aurelien Jarno To: glibc-cvs@sourceware.org Subject: [glibc/release/2.33/master] x86: include BMI1 and BMI2 in x86-64-v3 level X-Act-Checkin: glibc X-Git-Author: Aurelien Jarno X-Git-Refname: refs/heads/release/2.33/master X-Git-Oldrev: ea326b2e98e39a7e12b05b057206557488b20d61 X-Git-Newrev: 1480535aa3dd801449644a84a60d015e3cf860fb Message-Id: <20221003220445.291D53858D1E@sourceware.org> Date: Mon, 3 Oct 2022 22:04:45 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=1480535aa3dd801449644a84a60d015e3cf860fb commit 1480535aa3dd801449644a84a60d015e3cf860fb Author: Aurelien Jarno Date: Mon Oct 3 23:16:46 2022 +0200 x86: include BMI1 and BMI2 in x86-64-v3 level The "System V Application Binary Interface AMD64 Architecture Processor Supplement" mandates the BMI1 and BMI2 CPU features for the x86-64-v3 level. Reviewed-by: Noah Goldstein (cherry picked from commit b80f16adbd979831bf25ea491e1261e81885c2b6) Diff: --- sysdeps/x86/get-isa-level.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sysdeps/x86/get-isa-level.h b/sysdeps/x86/get-isa-level.h index aa80f56ca6..785c25a835 100644 --- a/sysdeps/x86/get-isa-level.h +++ b/sysdeps/x86/get-isa-level.h @@ -47,6 +47,8 @@ get_isa_level (const struct cpu_features *cpu_features) isa_level |= GNU_PROPERTY_X86_ISA_1_V2; if (CPU_FEATURE_USABLE_P (cpu_features, AVX) && CPU_FEATURE_USABLE_P (cpu_features, AVX2) + && CPU_FEATURE_USABLE_P (cpu_features, BMI1) + && CPU_FEATURE_USABLE_P (cpu_features, BMI2) && CPU_FEATURE_USABLE_P (cpu_features, F16C) && CPU_FEATURE_USABLE_P (cpu_features, FMA) && CPU_FEATURE_USABLE_P (cpu_features, LZCNT)