From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1944) id A96B93853540; Wed, 26 Oct 2022 14:50:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A96B93853540 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666795814; bh=9OL9NsFzCxFXwsRqmX7PdDXCXukxoNu1Nw4BfT8m+No=; h=From:To:Subject:Date:From; b=d4yBONVpqcBwHpBk92s+eyZ9tWPVJhiWrdOwXgkbaUmT8Un1rdcMh4dJ/fweTQoTE QbBkgNmZt0gsOJV8fwfSLu1g8KFtE0Hy9PEMp5pi0jGQig8/LJrL/F96decv4wcc71 K6CAsD8C53saGk1ZsWzh7RSNuk8hVlHm1CnnKguk= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Szabolcs Nagy To: glibc-cvs@sourceware.org Subject: [glibc/arm/morello/main] Revert "TODO(drop): aarch64: morello: CPU feature detection for Morello" X-Act-Checkin: glibc X-Git-Author: Szabolcs Nagy X-Git-Refname: refs/heads/arm/morello/main X-Git-Oldrev: 782fb76092163827a34cff6b66ed654a9e5a070e X-Git-Newrev: 3295936b272a1018e31fd634b7e327101eacd711 Message-Id: <20221026145014.A96B93853540@sourceware.org> Date: Wed, 26 Oct 2022 14:50:14 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=3295936b272a1018e31fd634b7e327101eacd711 commit 3295936b272a1018e31fd634b7e327101eacd711 Author: Szabolcs Nagy Date: Fri Oct 21 15:41:13 2022 +0100 Revert "TODO(drop): aarch64: morello: CPU feature detection for Morello" This reverts commit 078ebf3e35bd0c50b58dc2ec796530054f69b9a9. Diff: --- sysdeps/aarch64/multiarch/init-arch.h | 4 +--- sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 3 --- sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 6 ------ 3 files changed, 1 insertion(+), 12 deletions(-) diff --git a/sysdeps/aarch64/multiarch/init-arch.h b/sysdeps/aarch64/multiarch/init-arch.h index d5219186be..a4dcac0019 100644 --- a/sysdeps/aarch64/multiarch/init-arch.h +++ b/sysdeps/aarch64/multiarch/init-arch.h @@ -35,6 +35,4 @@ bool __attribute__((unused)) mte = \ MTE_ENABLED (); \ bool __attribute__((unused)) sve = \ - GLRO(dl_aarch64_cpu_features).sve; \ - bool __attribute__((unused)) morello = \ - GLRO(dl_hwcap2) & HWCAP2_MORELLO; + GLRO(dl_aarch64_cpu_features).sve; diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index 3d95815d5f..d14c0f4e1f 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -126,7 +126,4 @@ init_cpu_features (struct cpu_features *cpu_features) /* Check if SVE is supported. */ cpu_features->sve = GLRO (dl_hwcap) & HWCAP_SVE; - - /* Check if Morello is supported. */ - cpu_features->morello = GLRO (dl_hwcap2) & HWCAP2_MORELLO; } diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index 0742ac1409..391165a99c 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -68,11 +68,6 @@ #define IS_A64FX(midr) (MIDR_IMPLEMENTOR(midr) == 'F' \ && MIDR_PARTNUM(midr) == 0x001) -/* TODO: This is based on the Morello Fast Model. - Will MIDR_IMPLEMENTOR change to 'A'? */ -#define IS_MORELLO(midr) (MIDR_IMPLEMENTOR(midr) == 0x3f \ - && MIDR_PARTNUM(midr) == 0x412) - struct cpu_features { uint64_t midr_el1; @@ -81,7 +76,6 @@ struct cpu_features /* Currently, the GLIBC memory tagging tunable only defines 8 bits. */ uint8_t mte_state; bool sve; - bool morello; }; #endif /* _CPU_FEATURES_AARCH64_H */