From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1944) id C8EBE385151A; Wed, 26 Oct 2022 15:08:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C8EBE385151A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666796905; bh=e2QdPiIYCAn1S4FeRdcKzZM06aUPlqbyatUUHjKx0pk=; h=From:To:Subject:Date:From; b=IApKQx8LxZGYY3l6DVCHHqGFXgindvY5slOwORLGVEbjhEz8QZVOCx5tJgXuz3ZKK t62fNc+1nw9L10xOAaZOnTa6VH1T8mHX5dRy1J01XUGWJHCMfxo/LzQpuefn4K/usI obXq/cmU4mjOmhNbJdOVdr5rOGAM++MtNkrsaToI= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Szabolcs Nagy To: glibc-cvs@sourceware.org Subject: [glibc/arm/morello/main] x86: include BMI1 and BMI2 in x86-64-v3 level X-Act-Checkin: glibc X-Git-Author: Aurelien Jarno X-Git-Refname: refs/heads/arm/morello/main X-Git-Oldrev: cdc496eb55e30f8f2461bedb0a7381c0a7a3d3ae X-Git-Newrev: 18bec23cbb4d530a2a8ce95353770661fabcd55f Message-Id: <20221026150825.C8EBE385151A@sourceware.org> Date: Wed, 26 Oct 2022 15:08:25 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=18bec23cbb4d530a2a8ce95353770661fabcd55f commit 18bec23cbb4d530a2a8ce95353770661fabcd55f Author: Aurelien Jarno Date: Mon Oct 3 23:46:11 2022 +0200 x86: include BMI1 and BMI2 in x86-64-v3 level The "System V Application Binary Interface AMD64 Architecture Processor Supplement" mandates the BMI1 and BMI2 CPU features for the x86-64-v3 level. Reviewed-by: Noah Goldstein (cherry picked from commit b80f16adbd979831bf25ea491e1261e81885c2b6) Diff: --- sysdeps/x86/get-isa-level.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sysdeps/x86/get-isa-level.h b/sysdeps/x86/get-isa-level.h index 1ade78ab73..5b4dd5f062 100644 --- a/sysdeps/x86/get-isa-level.h +++ b/sysdeps/x86/get-isa-level.h @@ -47,6 +47,8 @@ get_isa_level (const struct cpu_features *cpu_features) isa_level |= GNU_PROPERTY_X86_ISA_1_V2; if (CPU_FEATURE_USABLE_P (cpu_features, AVX) && CPU_FEATURE_USABLE_P (cpu_features, AVX2) + && CPU_FEATURE_USABLE_P (cpu_features, BMI1) + && CPU_FEATURE_USABLE_P (cpu_features, BMI2) && CPU_FEATURE_USABLE_P (cpu_features, F16C) && CPU_FEATURE_USABLE_P (cpu_features, FMA) && CPU_FEATURE_USABLE_P (cpu_features, LZCNT)