[glibc/arm/morello/main] cheri: malloc: add tunable to turn narrowing off

[Szabolcs Nagy <nsz@sourceware.org>]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=f0f77b883f9e74e6843081af280aa291a9182601

commit f0f77b883f9e74e6843081af280aa291a9182601
Author: Szabolcs Nagy <szabolcs.nagy@arm.com>
Date:   Thu Oct 6 12:00:39 2022 +0100

    cheri: malloc: add tunable to turn narrowing off

Diff:
---
 elf/dl-tunables.list | 7 +++++++
 malloc/arena.c       | 6 ++++++
 manual/tunables.texi | 6 ++++++
 3 files changed, 19 insertions(+)

diff --git a/elf/dl-tunables.list b/elf/dl-tunables.list
index e6a56b3070..83f47dcd9a 100644
--- a/elf/dl-tunables.list
+++ b/elf/dl-tunables.list
@@ -159,6 +159,13 @@ glibc {
       maxval: 255
       security_level: SXID_IGNORE
     }
+    cap_narrowing {
+      type: INT_32
+      minval: 0
+      maxval: 1
+      default: 1
+      security_level: SXID_IGNORE
+    }
   }
 
   rtld {
diff --git a/malloc/arena.c b/malloc/arena.c
index 894f49b911..85cc2ad066 100644
--- a/malloc/arena.c
+++ b/malloc/arena.c
@@ -326,6 +326,12 @@ ptmalloc_init (void)
   tcache_key_initialize ();
 #endif
 
+#ifdef __CHERI_PURE_CAPABILITY__
+  if (TUNABLE_GET_FULL (glibc, mem, cap_narrowing, int32_t, NULL) == 0)
+    cap_narrowing_enabled = false;
+  else
+    cap_narrowing_enabled = true;
+#endif
   cap_init ();
 
 #ifdef USE_MTAG
diff --git a/manual/tunables.texi b/manual/tunables.texi
index 83cdcdac6d..ffe0202627 100644
--- a/manual/tunables.texi
+++ b/manual/tunables.texi
@@ -612,3 +612,9 @@ support in the kernel if this tunable has any non-zero value.
 
 The default value is @samp{0}, which disables all memory tagging.
 @end deftp
+
+@deftp Tunable glibc.mem.cap_narrowing
+On CHERI architecture use capability bounds narrowing in the malloc
+implementation. By default it is set to 1, to disable bounds narrowing
+set it to 0.
+@end deftp