From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1895) id BB152385842A; Tue, 17 Jan 2023 16:35:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BB152385842A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1673973356; bh=H7SYY3qxlnAISZbtRQNbvoueW3kiL9reEMduUVmOFN0=; h=From:To:Subject:Date:From; b=KA2UEglVMkJ/1o2UXdxnVP3Gq8NcNUW0+jfAi6b8UJO1cM5YwULj29kKWveI3Ph8+ 3U/9GREb4ZQ1Dutxp8n9UCqG2+0gN/BReg3tHfeHREZZJ881Twk1qQo0Q7/GkwR3Sw EEb1wOdqHVFGJ+za+nbQt29zz8kZ6QxpMnxB1bA8= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Wilco Dijkstra To: glibc-cvs@sourceware.org Subject: [glibc] AArch64: Improve strchrnul X-Act-Checkin: glibc X-Git-Author: Wilco Dijkstra X-Git-Refname: refs/heads/master X-Git-Oldrev: 51541a229740801882490177fa178e49264b13fb X-Git-Newrev: 09ebd8549b2ce5a3a6c0c7c5f3e62227faf50a99 Message-Id: <20230117163556.BB152385842A@sourceware.org> Date: Tue, 17 Jan 2023 16:35:56 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=09ebd8549b2ce5a3a6c0c7c5f3e62227faf50a99 commit 09ebd8549b2ce5a3a6c0c7c5f3e62227faf50a99 Author: Wilco Dijkstra Date: Wed Jan 11 13:52:23 2023 +0000 AArch64: Improve strchrnul Unroll the main loop, which improves performance slightly. Reviewed-by: Szabolcs Nagy Diff: --- sysdeps/aarch64/strchrnul.S | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/sysdeps/aarch64/strchrnul.S b/sysdeps/aarch64/strchrnul.S index 4ca1e58c36..aa8c9a4363 100644 --- a/sysdeps/aarch64/strchrnul.S +++ b/sysdeps/aarch64/strchrnul.S @@ -70,14 +70,22 @@ ENTRY (__strchrnul) .p2align 4 L(loop): - ldr qdata, [src, 16]! + ldr qdata, [src, 16] + cmeq vhas_chr.16b, vdata.16b, vrepchr.16b + cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b + umaxp vend.16b, vhas_chr.16b, vhas_chr.16b + fmov tmp1, dend + cbnz tmp1, L(end) + ldr qdata, [src, 32]! cmeq vhas_chr.16b, vdata.16b, vrepchr.16b cmhs vhas_chr.16b, vhas_chr.16b, vdata.16b umaxp vend.16b, vhas_chr.16b, vhas_chr.16b fmov tmp1, dend cbz tmp1, L(loop) - + sub src, src, 16 +L(end): shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ + add src, src, 16 fmov tmp1, dend #ifndef __AARCH64EB__ rbit tmp1, tmp1