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From: H.J. Lu <hjl@sourceware.org>
To: glibc-cvs@sourceware.org
Subject: [glibc] <sys/platform/x86.h>: Add CMPCCXADD support
Date: Wed,  5 Apr 2023 22:44:44 +0000 (GMT)	[thread overview]
Message-ID: <20230405224444.130E13858C2B@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=2f02d0d8e15741efa1829dbaaf58b2d3e7c707a2

commit 2f02d0d8e15741efa1829dbaaf58b2d3e7c707a2
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Apr 5 09:21:35 2023 -0700

    <sys/platform/x86.h>: Add CMPCCXADD support
    
    Add CMPCCXADD support to <sys/platform/x86.h>.
    Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>

Diff:
---
 manual/platform.texi               | 3 +++
 sysdeps/x86/bits/platform/x86.h    | 1 +
 sysdeps/x86/cpu-features.c         | 1 +
 sysdeps/x86/include/cpu-features.h | 3 +++
 sysdeps/x86/tst-get-cpu-features.c | 2 ++
 5 files changed, 10 insertions(+)

diff --git a/manual/platform.texi b/manual/platform.texi
index be04194c88..e4d2c00886 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -294,6 +294,9 @@ extensions.
 @item
 @code{CMOV} -- Conditional Move instructions.
 
+@item
+@code{CMPCCXADD} -- CMPccXADD instruction.
+
 @item
 @code{CMPXCHG16B} -- CMPXCHG16B instruction.
 
diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
index c9ee8fcf90..0187964aba 100644
--- a/sysdeps/x86/bits/platform/x86.h
+++ b/sysdeps/x86/bits/platform/x86.h
@@ -292,6 +292,7 @@ enum
   x86_cpu_AVX_VNNI		= x86_cpu_index_7_ecx_1_eax + 4,
   x86_cpu_AVX512_BF16		= x86_cpu_index_7_ecx_1_eax + 5,
   x86_cpu_LASS			= x86_cpu_index_7_ecx_1_eax + 6,
+  x86_cpu_CMPCCXADD		= x86_cpu_index_7_ecx_1_eax + 7,
   x86_cpu_FZLRM			= x86_cpu_index_7_ecx_1_eax + 10,
   x86_cpu_FSRS			= x86_cpu_index_7_ecx_1_eax + 11,
   x86_cpu_FSRCS			= x86_cpu_index_7_ecx_1_eax + 12,
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index e591e55a88..da04ad0b00 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -100,6 +100,7 @@ update_active (struct cpu_features *cpu_features)
   CPU_FEATURE_SET_ACTIVE (cpu_features, RDTSCP);
   CPU_FEATURE_SET_ACTIVE (cpu_features, WBNOINVD);
   CPU_FEATURE_SET_ACTIVE (cpu_features, RAO_INT);
+  CPU_FEATURE_SET_ACTIVE (cpu_features, CMPCCXADD);
   CPU_FEATURE_SET_ACTIVE (cpu_features, FZLRM);
   CPU_FEATURE_SET_ACTIVE (cpu_features, FSRS);
   CPU_FEATURE_SET_ACTIVE (cpu_features, FSRCS);
diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h
index b946a88ad1..4e40fe0482 100644
--- a/sysdeps/x86/include/cpu-features.h
+++ b/sysdeps/x86/include/cpu-features.h
@@ -305,6 +305,7 @@ enum
 #define bit_cpu_RAO_INT		(1u << 3)
 #define bit_cpu_AVX_VNNI	(1u << 4)
 #define bit_cpu_AVX512_BF16	(1u << 5)
+#define bit_cpu_CMPCCXADD	(1u << 7)
 #define bit_cpu_FZLRM		(1u << 10)
 #define bit_cpu_FSRS		(1u << 11)
 #define bit_cpu_FSRCS		(1u << 12)
@@ -541,6 +542,7 @@ enum
 #define index_cpu_RAO_INT	CPUID_INDEX_7_ECX_1
 #define index_cpu_AVX_VNNI	CPUID_INDEX_7_ECX_1
 #define index_cpu_AVX512_BF16	CPUID_INDEX_7_ECX_1
+#define index_cpu_CMPCCXADD	CPUID_INDEX_7_ECX_1
 #define index_cpu_FZLRM		CPUID_INDEX_7_ECX_1
 #define index_cpu_FSRS		CPUID_INDEX_7_ECX_1
 #define index_cpu_FSRCS		CPUID_INDEX_7_ECX_1
@@ -777,6 +779,7 @@ enum
 #define reg_RAO_INT		eax
 #define reg_AVX_VNNI		eax
 #define reg_AVX512_BF16		eax
+#define reg_CMPCCXADD		eax
 #define reg_FZLRM		eax
 #define reg_FSRS		eax
 #define reg_FSRCS		eax
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index 9da561a559..d8bc92560f 100644
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -204,6 +204,7 @@ do_test (void)
   CHECK_CPU_FEATURE_PRESENT (AVX_VNNI);
   CHECK_CPU_FEATURE_PRESENT (AVX512_BF16);
   CHECK_CPU_FEATURE_PRESENT (LASS);
+  CHECK_CPU_FEATURE_PRESENT (CMPCCXADD);
   CHECK_CPU_FEATURE_PRESENT (FZLRM);
   CHECK_CPU_FEATURE_PRESENT (FSRS);
   CHECK_CPU_FEATURE_PRESENT (FSRCS);
@@ -370,6 +371,7 @@ do_test (void)
   CHECK_CPU_FEATURE_ACTIVE (RAO_INT);
   CHECK_CPU_FEATURE_ACTIVE (AVX_VNNI);
   CHECK_CPU_FEATURE_ACTIVE (AVX512_BF16);
+  CHECK_CPU_FEATURE_ACTIVE (CMPCCXADD);
   CHECK_CPU_FEATURE_ACTIVE (FZLRM);
   CHECK_CPU_FEATURE_ACTIVE (FSRS);
   CHECK_CPU_FEATURE_ACTIVE (FSRCS);

                 reply	other threads:[~2023-04-05 22:44 UTC|newest]

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