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From: H.J. Lu <hjl@sourceware.org>
To: glibc-cvs@sourceware.org
Subject: [glibc] <sys/platform/x86.h>: Add PREFETCHI support
Date: Wed,  5 Apr 2023 22:45:30 +0000 (GMT)	[thread overview]
Message-ID: <20230405224530.25C583858C2C@sourceware.org> (raw)

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=81a3cc956ef4e324c83419fa6d7a559d6e762cd7

commit 81a3cc956ef4e324c83419fa6d7a559d6e762cd7
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Apr 5 09:21:44 2023 -0700

    <sys/platform/x86.h>: Add PREFETCHI support
    
    Add PREFETCHI support to <sys/platform/x86.h>.
    Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>

Diff:
---
 manual/platform.texi               | 3 +++
 sysdeps/x86/bits/platform/x86.h    | 1 +
 sysdeps/x86/cpu-features.c         | 1 +
 sysdeps/x86/include/cpu-features.h | 3 +++
 sysdeps/x86/tst-get-cpu-features.c | 2 ++
 5 files changed, 10 insertions(+)

diff --git a/manual/platform.texi b/manual/platform.texi
index e7448ffc1a..c6ed73cb97 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -533,6 +533,9 @@ extended state management using XSAVE/XRSTOR.
 @item
 @code{PREFETCHWT1} -- PREFETCHWT1 instruction.
 
+@item
+@code{PREFETCHI} -- PREFETCHIT0/1 instructions.
+
 @item
 @code{PSE} -- Page Size Extension.
 
diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
index 96eb4c070d..6555f9b91d 100644
--- a/sysdeps/x86/bits/platform/x86.h
+++ b/sysdeps/x86/bits/platform/x86.h
@@ -311,6 +311,7 @@ enum
   x86_cpu_AVX_VNNI_INT8		= x86_cpu_index_7_ecx_1_edx + 4,
   x86_cpu_AVX_NE_CONVERT	= x86_cpu_index_7_ecx_1_edx + 5,
   x86_cpu_AMX_COMPLEX		= x86_cpu_index_7_ecx_1_edx + 8,
+  x86_cpu_PREFETCHI		= x86_cpu_index_7_ecx_1_edx + 14,
 
   x86_cpu_index_19_ebx
     = (CPUID_INDEX_19 * 8 * 4 * sizeof (unsigned int)
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index c2bea6a32d..5bff8ec0b4 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -104,6 +104,7 @@ update_active (struct cpu_features *cpu_features)
   CPU_FEATURE_SET_ACTIVE (cpu_features, FZLRM);
   CPU_FEATURE_SET_ACTIVE (cpu_features, FSRS);
   CPU_FEATURE_SET_ACTIVE (cpu_features, FSRCS);
+  CPU_FEATURE_SET_ACTIVE (cpu_features, PREFETCHI);
   CPU_FEATURE_SET_ACTIVE (cpu_features, PTWRITE);
 
   if (!CPU_FEATURES_CPU_P (cpu_features, RTM_ALWAYS_ABORT))
diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h
index f14c1078d5..40b8129d6a 100644
--- a/sysdeps/x86/include/cpu-features.h
+++ b/sysdeps/x86/include/cpu-features.h
@@ -318,6 +318,7 @@ enum
 #define bit_cpu_AVX_VNNI_INT8	(1u << 4)
 #define bit_cpu_AVX_NE_CONVERT	(1u << 5)
 #define bit_cpu_AMX_COMPLEX	(1u << 8)
+#define bit_cpu_PREFETCHI	(1u << 14)
 
 /* CPUID_INDEX_19.  */
 
@@ -560,6 +561,7 @@ enum
 #define index_cpu_AVX_VNNI_INT8	CPUID_INDEX_7_ECX_1
 #define index_cpu_AVX_NE_CONVERT CPUID_INDEX_7_ECX_1
 #define index_cpu_AMX_COMPLEX	CPUID_INDEX_7_ECX_1
+#define index_cpu_PREFETCHI	CPUID_INDEX_7_ECX_1
 
 /* CPUID_INDEX_19.  */
 
@@ -804,6 +806,7 @@ enum
 #define reg_AVX_VNNI_INT8	edx
 #define reg_AVX_NE_CONVERT	edx
 #define reg_AMX_COMPLEX		edx
+#define reg_PREFETCHI		edx
 
 /* CPUID_INDEX_19.  */
 
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index 87fe27340f..1bd7e0be53 100644
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -218,6 +218,7 @@ do_test (void)
   CHECK_CPU_FEATURE_PRESENT (AVX_VNNI_INT8);
   CHECK_CPU_FEATURE_PRESENT (AVX_NE_CONVERT);
   CHECK_CPU_FEATURE_PRESENT (AMX_COMPLEX);
+  CHECK_CPU_FEATURE_PRESENT (PREFETCHI);
   CHECK_CPU_FEATURE_PRESENT (AESKLE);
   CHECK_CPU_FEATURE_PRESENT (WIDE_KL);
   CHECK_CPU_FEATURE_PRESENT (PTWRITE);
@@ -388,6 +389,7 @@ do_test (void)
   CHECK_CPU_FEATURE_ACTIVE (AVX_VNNI_INT8);
   CHECK_CPU_FEATURE_ACTIVE (AVX_NE_CONVERT);
   CHECK_CPU_FEATURE_ACTIVE (AMX_COMPLEX);
+  CHECK_CPU_FEATURE_ACTIVE (PREFETCHI);
   CHECK_CPU_FEATURE_ACTIVE (AESKLE);
   CHECK_CPU_FEATURE_ACTIVE (WIDE_KL);
   CHECK_CPU_FEATURE_ACTIVE (PTWRITE);

                 reply	other threads:[~2023-04-05 22:45 UTC|newest]

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