From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7844) id E7E6A385800C; Tue, 12 Sep 2023 03:47:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E7E6A385800C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1694490475; bh=xAj21Az5IDAzcZIV5Gatn6fUJdlDeaUA/QcUr431Kg4=; h=From:To:Subject:Date:From; b=VZ5fJcQKSjf6XTRMfcv/LuNzk/c/8bx4IF2U0A3d5ceuXMfgclmQNeErr/J87jKG3 9z67biwBFjlccUC8mQaKI152BqHHQZk2qI+Y+Qm5+egiWs+DCjjv/zEFWMC50XWFiP xUFeEY7c0VdNHs8s8frQnGEuegPGEVfC2koGNn8w= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Noah Goldstein To: glibc-cvs@sourceware.org Subject: [glibc/release/2.32/master] x86: Use `3/4*sizeof(per-thread-L3)` as low bound for NT threshold. X-Act-Checkin: glibc X-Git-Author: Noah Goldstein X-Git-Refname: refs/heads/release/2.32/master X-Git-Oldrev: 05c28930951588234226567227350c2339844f3d X-Git-Newrev: ed4ceabea12dc3748f7ee390187744c8d1911510 Message-Id: <20230912034755.E7E6A385800C@sourceware.org> Date: Tue, 12 Sep 2023 03:47:55 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=ed4ceabea12dc3748f7ee390187744c8d1911510 commit ed4ceabea12dc3748f7ee390187744c8d1911510 Author: Noah Goldstein Date: Fri Aug 11 18:37:27 2023 -0500 x86: Use `3/4*sizeof(per-thread-L3)` as low bound for NT threshold. On some machines we end up with incomplete cache information. This can make the new calculation of `sizeof(total-L3)/custom-divisor` end up lower than intended (and lower than the prior value). So reintroduce the old bound as a lower bound to avoid potentially regressing code where we don't have complete information to make the decision. Reviewed-by: DJ Delorie (cherry picked from commit 8b9a0af8ca012217bf90d1dc0694f85b49ae09da) Diff: --- sysdeps/x86/cacheinfo.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index 47a2487751..6c0a80ddbb 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -891,12 +891,21 @@ init_cacheinfo (void) modern HW detects streaming patterns and provides proper LRU hints so that the maximum thrashing capped at 1/associativity. */ unsigned long int non_temporal_threshold = shared / 4; + + /* If the computed non_temporal_threshold <= 3/4 * per-thread L3, we most + likely have incorrect/incomplete cache info in which case, default to + 3/4 * per-thread L3 to avoid regressions. */ + unsigned long int non_temporal_threshold_lowbound + = shared_per_thread * 3 / 4; + if (non_temporal_threshold < non_temporal_threshold_lowbound) + non_temporal_threshold = non_temporal_threshold_lowbound; + /* If no ERMS, we use the per-thread L3 chunking. Normal cacheable stores run a higher risk of actually thrashing the cache as they don't have a HW LRU hint. As well, their performance in highly parallel situations is noticeably worse. */ if (!CPU_FEATURE_USABLE_P (cpu_features, ERMS)) - non_temporal_threshold = shared_per_thread * 3 / 4; + non_temporal_threshold = non_temporal_threshold_lowbound; __x86_shared_non_temporal_threshold = (cpu_features->non_temporal_threshold != 0