From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1791) id 0D46C3853508; Fri, 27 Oct 2023 12:30:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0D46C3853508 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1698409803; bh=jPkBimOr8g1ebRMqz5hgw6H9UXxQQPBYchM2gbCp1iQ=; h=From:To:Subject:Date:From; b=OonLwgnQPEHw6OAvwIM2L3Wq9EIacHG2IY84RnbcUDb/uREpof8BP4nKWBscSJKUp MKHz/vDc4HhL5oN7qu0pgI7qjdZRS2bW+B+iNhx2ANTtY+trFMP/1NZ96pHNDDzq8Y RaEv5HYCM2/plsGMIysweH1WbAzTx36dA49j9UW4= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Adhemerval Zanella To: glibc-cvs@sourceware.org Subject: [glibc/azanella/bz30944-memcpy-zen] x86: Do not prefer ERMS for memset on Zen3+ X-Act-Checkin: glibc X-Git-Author: Adhemerval Zanella X-Git-Refname: refs/heads/azanella/bz30944-memcpy-zen X-Git-Oldrev: 51da90c20d54c5098d9e1b01950a43bd2197813d X-Git-Newrev: 4c023248ca791eefec5a7553057c0af3b9035f6c Message-Id: <20231027123003.0D46C3853508@sourceware.org> Date: Fri, 27 Oct 2023 12:30:03 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=4c023248ca791eefec5a7553057c0af3b9035f6c commit 4c023248ca791eefec5a7553057c0af3b9035f6c Author: Adhemerval Zanella Date: Fri Oct 27 00:08:15 2023 -0300 x86: Do not prefer ERMS for memset on Zen3+ The REP STOSB usage on memset does show any performance gain on Zen3/Zen4 cores compared to the vectorized loops. Checked on x86_64-linux-gnu. Diff: --- sysdeps/x86/dl-cacheinfo.h | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/sysdeps/x86/dl-cacheinfo.h b/sysdeps/x86/dl-cacheinfo.h index 546ff0725a..f5fd7b2566 100644 --- a/sysdeps/x86/dl-cacheinfo.h +++ b/sysdeps/x86/dl-cacheinfo.h @@ -1010,11 +1010,17 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) if (tunable_size > minimum_rep_movsb_threshold) rep_movsb_threshold = tunable_size; - /* NB: The default value of the x86_rep_stosb_threshold tunable is the - same as the default value of __x86_rep_stosb_threshold and the - minimum value is fixed. */ - rep_stosb_threshold = TUNABLE_GET (x86_rep_stosb_threshold, - long int, NULL); + /* For AMD Zen3+ architecture, the performance of vectorized loop is + slight better than ERMS. */ + if (cpu_features->basic.kind == arch_kind_amd) + rep_stosb_threshold = SIZE_MAX; + + if (TUNABLE_IS_INITIALIZED (x86_rep_stosb_threshold)) + /* NB: The default value of the x86_rep_stosb_threshold tunable is the + same as the default value of __x86_rep_stosb_threshold and the + minimum value is fixed. */ + rep_stosb_threshold = TUNABLE_GET (x86_rep_stosb_threshold, + long int, NULL); TUNABLE_SET_WITH_BOUNDS (x86_data_cache_size, data, 0, SIZE_MAX); TUNABLE_SET_WITH_BOUNDS (x86_shared_cache_size, shared, 0, SIZE_MAX);