From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1791) id F197F385840D; Tue, 19 Dec 2023 18:35:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F197F385840D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1703010939; bh=qQIhQnJAdQk9qg3PjnY3x/ViAAjPYACIu7z6LFMMnJ8=; h=From:To:Subject:Date:From; b=Rbnk5w/eCw/MhfQHzLCNZUwTg2cMsL4B1FGUGFrnMXNzeO7fK+/+1xMyRT56hxmHt 9WRDO1P23lJRn3kncoHUmDqRvUJzscOfJzbnswEp7Gv2+yRGFp1EzjgFGfIkZ/xC/L W9edisqaouUiZT5ooSqTYMM72ajRtv0FBBm5Prsw= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Adhemerval Zanella To: glibc-cvs@sourceware.org Subject: [glibc] manual: Clarify undefined behavior of feenableexcept (BZ 31019) X-Act-Checkin: glibc X-Git-Author: Bruno Haible X-Git-Refname: refs/heads/master X-Git-Oldrev: 787282dede7f134fdb22155cee0c35172e3e28f3 X-Git-Newrev: e55599e0286655dd5f1f5b48005a17be37cc7f2c Message-Id: <20231219183539.F197F385840D@sourceware.org> Date: Tue, 19 Dec 2023 18:35:39 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=e55599e0286655dd5f1f5b48005a17be37cc7f2c commit e55599e0286655dd5f1f5b48005a17be37cc7f2c Author: Bruno Haible Date: Wed Nov 1 02:10:11 2023 +0100 manual: Clarify undefined behavior of feenableexcept (BZ 31019) Explain undefined behavior of feenableexcept in a special case. Reviewed-by: Carlos O'Donell Diff: --- manual/arith.texi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/manual/arith.texi b/manual/arith.texi index fa7110e992..be24c20493 100644 --- a/manual/arith.texi +++ b/manual/arith.texi @@ -1176,6 +1176,12 @@ enabled, the status of the other exceptions is not changed. The function returns the previous enabled exceptions in case the operation was successful, @code{-1} otherwise. + +Note: Enabling traps for an exception for which the exception flag is +currently already set (@pxref{Status bit operations}) has unspecified +consequences: it may or may not trigger a trap immediately. +@c It triggers a trap immediately on powerpc*, at the next floating- +@c instruction on i386, and not at all on the other CPUs. @end deftypefun @deftypefun int fedisableexcept (int @var{excepts})