[glibc] hppa: Fix undefined behaviour in feclearexcept (BZ 30983)

[glibc] hppa: Fix undefined behaviour in feclearexcept (BZ 30983)

[Adhemerval Zanella]

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=d0829302728954e0abacfc01551c17daf4d61c87

commit d0829302728954e0abacfc01551c17daf4d61c87
Author: Bruno Haible <bruno@clisp.org>
Date:   Thu Nov 2 16:19:44 2023 -0300

    hppa: Fix undefined behaviour in feclearexcept (BZ 30983)
    
    The expression
    
      (excepts & FE_ALL_EXCEPT) << 27
    
    produces a signed integer overflow when 'excepts' is specified as
    FE_INVALID (= 0x10), because
      - excepts is of type 'int',
      - FE_ALL_EXCEPT is of type 'int',
      - thus (excepts & FE_ALL_EXCEPT) is (int) 0x10,
      - 'int' is 32 bits wide.
    
    The patched code produces the same instruction sequence as
    previosuly.
    
    Reviewed-by: Carlos O'Donell <carlos@redhat.com>

Diff:
---
 sysdeps/hppa/fpu/fclrexcpt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sysdeps/hppa/fpu/fclrexcpt.c b/sysdeps/hppa/fpu/fclrexcpt.c
index 055fb04ccc..46caf39ec1 100644
--- a/sysdeps/hppa/fpu/fclrexcpt.c
+++ b/sysdeps/hppa/fpu/fclrexcpt.c
@@ -26,7 +26,7 @@ feclearexcept (int excepts)
   /* Get the current status word. */
   __asm__ ("fstd %%fr0,0(%1)" : "=m" (s.l) : "r" (&s.l) : "%r0");
   /* Clear all the relevant bits. */
-  s.sw[0] &= ~((excepts & FE_ALL_EXCEPT) << 27);
+  s.sw[0] &= ~(((unsigned int) excepts & FE_ALL_EXCEPT) << 27);
   __asm__ ("fldd 0(%0),%%fr0" : : "r" (&s.l), "m" (s.l) : "%r0");
 
   /* Success.  */