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From: Adhemerval Zanella <azanella@sourceware.org>
To: glibc-cvs@sourceware.org
Subject: [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
Date: Fri, 9 Feb 2024 17:32:35 +0000 (GMT) [thread overview]
Message-ID: <20240209173235.C1F76385841A@sourceware.org> (raw)
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=1f05b8c59e62ca6f5313525530a251b9c6d2eece
commit 1f05b8c59e62ca6f5313525530a251b9c6d2eece
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Tue Aug 9 17:22:58 2022 -0300
arm: Use vmov.i32 instead of vmov on neon memchr
clang fails with:
error: invalid instruction
Diff:
---
sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index 3f593f4268..f61e73faed 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
vpadd.i8 vdata1_0, vdata1_0, vdata1_1
vpadd.i8 vdata0_0, vdata0_0, vdata1_0
vpadd.i8 vdata0_0, vdata0_0, vdata0_0
- vmov synd, vdata0_0[0]
+ vmov.i32 synd, vdata0_0[0]
/* Clear the soff lower bits */
lsr synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
vpadd.i8 vdata1_0, vdata1_0, vdata1_1
vpadd.i8 vdata0_0, vdata0_0, vdata1_0
vpadd.i8 vdata0_0, vdata0_0, vdata0_0
- vmov synd, vdata0_0[0]
+ vmov.i32 synd, vdata0_0[0]
cbz synd, .Lnotfound
bhi .Ltail /* Uses the condition code from
subs cntin, cntin, #32 above. */
next reply other threads:[~2024-02-09 17:32 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-09 17:32 Adhemerval Zanella [this message]
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2022-10-28 17:42 Adhemerval Zanella
2022-10-04 13:00 Adhemerval Zanella
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