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From: H.J. Lu <hjl@sourceware.org> To: glibc-cvs@sourceware.org Subject: [glibc] x86: Expand the comment on when REP STOSB is used on memset Date: Tue, 13 Feb 2024 16:54:25 +0000 (GMT) [thread overview] Message-ID: <20240213165425.3C3B83858037@sourceware.org> (raw) https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=491e55beab7457ed310a4a47496f4a333c5d1032 commit 491e55beab7457ed310a4a47496f4a333c5d1032 Author: Adhemerval Zanella <adhemerval.zanella@linaro.org> Date: Thu Feb 8 10:08:40 2024 -0300 x86: Expand the comment on when REP STOSB is used on memset Reviewed-by: H.J. Lu <hjl.tools@gmail.com> Diff: --- sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S index 9984c3ca0f..97839a2248 100644 --- a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S @@ -21,7 +21,9 @@ 2. If size is less than VEC, use integer register stores. 3. If size is from VEC_SIZE to 2 * VEC_SIZE, use 2 VEC stores. 4. If size is from 2 * VEC_SIZE to 4 * VEC_SIZE, use 4 VEC stores. - 5. If size is more to 4 * VEC_SIZE, align to 4 * VEC_SIZE with + 5. On machines ERMS feature, if size is greater or equal than + __x86_rep_stosb_threshold then REP STOSB will be used. + 6. If size is more to 4 * VEC_SIZE, align to 4 * VEC_SIZE with 4 VEC stores and store 4 * VEC at a time until done. */ #include <sysdep.h>
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