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From: Adhemerval Zanella <azanella@sourceware.org> To: glibc-cvs@sourceware.org Subject: [glibc] sparc: Treat the version field in the FPU control word as reserved Date: Mon, 19 Feb 2024 14:16:48 +0000 (GMT) [thread overview] Message-ID: <20240219141648.F1A3F3864804@sourceware.org> (raw) https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=aa4106db1d6f80e64dcc8818cc07aacd7fabb03e commit aa4106db1d6f80e64dcc8818cc07aacd7fabb03e Author: Daniel Cederman <cederman@gaisler.com> Date: Mon Feb 19 10:55:50 2024 -0300 sparc: Treat the version field in the FPU control word as reserved The FSR version field is read-only and might be non-zero. This allows math/test-fpucw* to correctly pass when the version is non-zero. Signed-off-by: Daniel Cederman <cederman@gaisler.com> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org> Diff: --- sysdeps/sparc/fpu/fpu_control.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sysdeps/sparc/fpu/fpu_control.h b/sysdeps/sparc/fpu/fpu_control.h index 48368a7ce1..fa11b2ba6e 100644 --- a/sysdeps/sparc/fpu/fpu_control.h +++ b/sysdeps/sparc/fpu/fpu_control.h @@ -42,7 +42,7 @@ #define _FPU_RC_ZERO 0x40000000 #define _FPU_RC_NEAREST 0x0 /* RECOMMENDED */ -#define _FPU_RESERVED 0x30300000 /* Reserved bits in cw */ +#define _FPU_RESERVED 0x303e0000 /* Reserved bits in cw */ /* Now two recommended cw */
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