From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1895) id 5E75938460B1; Wed, 10 Apr 2024 15:07:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5E75938460B1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1712761657; bh=DaXg2Ap+ASWB+Lmt/6YdYwX/6njBw0BYoUvVjY7XsVQ=; h=From:To:Subject:Date:From; b=nKRBv8S8JyKzP4NVUIdCkSjKMh7N80qm+kJhgtiO1l/CvOLvStCEAswoTUMdWs6gQ 0mGvVmolKUIBaqLFy1+JIRc9AbJqYWSpX5jE2iGD895LiHe8Kp+tEqz2sh4Wei3eeS ZUUDRq0tnq3Sp8eMUtignhVFwNW0LcgQC9UQ7W5A= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Wilco Dijkstra To: glibc-cvs@sourceware.org Subject: [glibc/release/2.35/master] Add HWCAP2_MOPS from Linux 6.5 to AArch64 bits/hwcap.h X-Act-Checkin: glibc X-Git-Author: Joseph Myers X-Git-Refname: refs/heads/release/2.35/master X-Git-Oldrev: b9e93c5ff77cf7d486f03b25274aba4aeac95425 X-Git-Newrev: c4e222334ba1ce4715f264ebefc3473450bf01e4 Message-Id: <20240410150737.5E75938460B1@sourceware.org> Date: Wed, 10 Apr 2024 15:07:37 +0000 (GMT) List-Id: https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=c4e222334ba1ce4715f264ebefc3473450bf01e4 commit c4e222334ba1ce4715f264ebefc3473450bf01e4 Author: Joseph Myers Date: Tue Oct 17 13:13:27 2023 +0000 Add HWCAP2_MOPS from Linux 6.5 to AArch64 bits/hwcap.h Linux 6.5 adds a new AArch64 HWCAP2 value, HWCAP2_MOPS. Add it to glibc's bits/hwcap.h. Tested with build-many-glibcs.py for aarch64-linux-gnu. (cherry picked from commit ff5d2abd18629e0efac41e31699cdff3be0e08fa) Diff: --- sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h b/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h index a1cf59270f..b7ffea84e5 100644 --- a/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h +++ b/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h @@ -77,3 +77,25 @@ #define HWCAP2_ECV (1 << 19) #define HWCAP2_AFP (1 << 20) #define HWCAP2_RPRES (1 << 21) +#define HWCAP2_MTE3 (1 << 22) +#define HWCAP2_SME (1 << 23) +#define HWCAP2_SME_I16I64 (1 << 24) +#define HWCAP2_SME_F64F64 (1 << 25) +#define HWCAP2_SME_I8I32 (1 << 26) +#define HWCAP2_SME_F16F32 (1 << 27) +#define HWCAP2_SME_B16F32 (1 << 28) +#define HWCAP2_SME_F32F32 (1 << 29) +#define HWCAP2_SME_FA64 (1 << 30) +#define HWCAP2_WFXT (1UL << 31) +#define HWCAP2_EBF16 (1UL << 32) +#define HWCAP2_SVE_EBF16 (1UL << 33) +#define HWCAP2_CSSC (1UL << 34) +#define HWCAP2_RPRFM (1UL << 35) +#define HWCAP2_SVE2P1 (1UL << 36) +#define HWCAP2_SME2 (1UL << 37) +#define HWCAP2_SME2P1 (1UL << 38) +#define HWCAP2_SME_I16I32 (1UL << 39) +#define HWCAP2_SME_BI32I32 (1UL << 40) +#define HWCAP2_SME_B16B16 (1UL << 41) +#define HWCAP2_SME_F16F16 (1UL << 42) +#define HWCAP2_MOPS (1UL << 43)