From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 2382 invoked by alias); 22 May 2019 15:34:43 -0000 Mailing-List: contact gnu-gabi-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Post: List-Help: List-Subscribe: Sender: gnu-gabi-owner@sourceware.org Received: (qmail 2356 invoked by uid 89); 22 May 2019 15:34:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Checked: by ClamAV 0.100.3 on sourceware.org X-Virus-Found: No X-Spam-SWARE-Status: No, score=-6.0 required=5.0 tests=AWL,BAYES_00,KAM_ASCII_DIVIDERS,KAM_NUMSUBJECT,SPF_HELO_PASS autolearn=no version=3.3.1 spammy=H*f:sk:7be6eec, H*f:sk:87y32y3, H*i:sk:0167c33, H*f:sk:0167c33 X-Spam-Status: No, score=-6.0 required=5.0 tests=AWL,BAYES_00,KAM_ASCII_DIVIDERS,KAM_NUMSUBJECT,SPF_HELO_PASS autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on sourceware.org X-Spam-Level: X-Spam-User: qpsmtpd, 3 recipients X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 22 May 2019 15:34:41 +0000 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C84343082B5F; Wed, 22 May 2019 15:34:30 +0000 (UTC) Received: from oldenburg2.str.redhat.com (ovpn-117-43.ams2.redhat.com [10.36.117.43]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BA9745C29A; Wed, 22 May 2019 15:34:23 +0000 (UTC) From: Florian Weimer To: Szabolcs Nagy Cc: nd , GNU C Library , Binutils , GCC Development , "gnu-gabi\@sourceware.org" , Ramana Radhakrishnan , Richard Earnshaw , Tejas Belagod , Richard Sandiford , Steve Ellcey , Richard Henderson Subject: Re: [AArch64 ELF ABI] Vector calls and lazy binding on AArch64 In-Reply-To: <0167c338-09b6-288f-6314-ccc470894ac3@arm.com> (Szabolcs Nagy's message of "Wed, 22 May 2019 15:23:44 +0000") References: <7be6eecc-9e36-c782-1c87-e608bb1b5678@arm.com> <87y32y34wi.fsf@oldenburg2.str.redhat.com> <0167c338-09b6-288f-6314-ccc470894ac3@arm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) Date: Tue, 01 Jan 2019 00:00:00 -0000 Message-ID: <87pnoa33lu.fsf@oldenburg2.str.redhat.com> MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Wed, 22 May 2019 15:34:40 +0000 (UTC) X-IsSubscribed: yes X-SW-Source: 2019-q2/txt/msg00003.txt.bz2 * Szabolcs Nagy: > On 22/05/2019 16:06, Florian Weimer wrote: >> * Szabolcs Nagy: >> >>> AAELF64: in the Symbol Table section add >>> >>> st_other Values >>> The st_other member of a symbol table entry specifies the symbol's >>> visibility in the lowest 2 bits. The top 6 bits are unused in the >>> generic ELF ABI [SCO-ELF], and while there are no values reserved for >>> processor-specific semantics, many other architectures have used these >>> bits. >>> >>> The defined processor-specific st_other flag values are listed in >>> Table 4-5-1. >>> >>> Table 4-5-1, Processor specific st_other flags >>> +------------------------+------+---------------------+ >>> |Name | Mask | Comment | >>> +------------------------+------+---------------------+ >>> |STO_AARCH64_VARIANT_PCS | 0x80 | The function | >>> | | | associated with the | >>> | | | symbol may follow a | >>> | | | variant procedure | >>> | | | call standard with | >>> | | | different register | >>> | | | usage convention. | >>> +------------------------+------+---------------------+ >>> >>> A symbol table entry that is marked with the STO_AARCH64_VARIANT_PCS >>> flag set in its st_other field may be associated with a function that >>> follows a variant procedure call standard with different register >>> usage convention from the one defined in the base procedure call >>> standard for the list of argument, caller-saved and callee-saved >>> registers [AAPCS64]. The rules in the Call and Jump relocations >>> section still apply to such functions, and if a subroutine is called >>> via a symbol reference that is marked with STO_AARCH64_VARIANT_PCS >>> then code that runs between the calling routine and called subroutine >>> must preserve the contents of all registers except IP0, IP1 and the >>> condition code flags [AAPCS64]. >> >> Can you clarify if there has to be a valid stack at this point which can >> be used during the call transfer? What about the stack alignment >> requirement? > > the intention is to only allow 'register usage convention' to be > relaxed compared to the base PCS (which has rules for stack etc), > and even the register usage convention has to be compatible with > the 'Call and Jump relocations section' which essentially says that > veneers inserted by the linker between calls can clobber IP0, IP1 > and the condition flags. > > i.e. a variant pcs function follows the same rules as base pcs, but > it may use different caller-/callee-saved/argument regiseters. > > when SVE pcs is merged into the current AAPCS document, then i hope > the 'variant pcs' term used here will be properly specified so the > ELF ABI will just refer back to that. My concern is that with the current language, it's not clear whether it's possible to use the stack as a scratch area during the call transition, or rely on a valid TCB. I think this is rather underspecified. Thanks, Florian