From: Andreas Schwab <schwab@linux-m68k.org>
To: java-patches@gcc.gnu.org
Subject: Update libjava/sysdep/m68k/locks.h with new atomic builtins
Date: Fri, 15 Jun 2012 08:08:00 -0000 [thread overview]
Message-ID: <m28vfp6lq7.fsf@igel.home> (raw)
In-Reply-To: <CAFULd4aDxMhV_jr8BbkybJi2y2m5JPHLVVMZFYM5N1WEB6iTLQ@mail.gmail.com> (Uros Bizjak's message of "Thu, 14 Jun 2012 11:41:30 +0200")
There is not much to gain, the builtin generates pretty much the same
code. Tested on m68k-linux and checked in.
Andreas.
* sysdep/m68k/locks.h (compare_and_swap): Use
__sync_bool_compare_and_swap.
(release_set): Use write_barrier instead of inlining it.
diff --git a/libjava/sysdep/m68k/locks.h b/libjava/sysdep/m68k/locks.h
index d70757a..b51e314 100644
--- a/libjava/sysdep/m68k/locks.h
+++ b/libjava/sysdep/m68k/locks.h
@@ -1,6 +1,6 @@
// locks.h - Thread synchronization primitives. m68k implementation.
-/* Copyright (C) 2006 Free Software Foundation
+/* Copyright (C) 2006, 2012 Free Software Foundation
This file is part of libgcj.
@@ -22,12 +22,24 @@ static inline bool
compare_and_swap(volatile obj_addr_t *addr,
obj_addr_t old, obj_addr_t new_val)
{
- char result;
- __asm__ __volatile__("cas.l %2,%3,%0; seq %1"
- : "+m" (*addr), "=d" (result), "+d" (old)
- : "d" (new_val)
- : "memory");
- return (bool) result;
+ return __sync_bool_compare_and_swap (addr, old, new_val);
+}
+
+// Ensure that subsequent instructions do not execute on stale
+// data that was loaded from memory before the barrier.
+// On m68k, the hardware ensures that reads are properly ordered.
+static inline void
+read_barrier(void)
+{
+}
+
+// Ensure that prior stores to memory are completed with respect to other
+// processors.
+static inline void
+write_barrier(void)
+{
+ // m68k does not reorder writes. We just need to ensure that gcc also doesn't.
+ __asm__ __volatile__(" " : : : "memory");
}
// Set *addr to new_val with release semantics, i.e. making sure
@@ -38,8 +50,8 @@ compare_and_swap(volatile obj_addr_t *addr,
static inline void
release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
{
- __asm__ __volatile__(" " : : : "memory");
- *(addr) = new_val;
+ write_barrier ();
+ *addr = new_val;
}
// Compare_and_swap with release semantics instead of acquire semantics.
@@ -53,20 +65,4 @@ compare_and_swap_release(volatile obj_addr_t *addr,
return compare_and_swap(addr, old, new_val);
}
-// Ensure that subsequent instructions do not execute on stale
-// data that was loaded from memory before the barrier.
-// On m68k, the hardware ensures that reads are properly ordered.
-static inline void
-read_barrier(void)
-{
-}
-
-// Ensure that prior stores to memory are completed with respect to other
-// processors.
-static inline void
-write_barrier(void)
-{
- // m68k does not reorder writes. We just need to ensure that gcc also doesn't.
- __asm__ __volatile__(" " : : : "memory");
-}
#endif
--
1.7.10.4
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
parent reply other threads:[~2012-06-15 8:08 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <CAFULd4aDxMhV_jr8BbkybJi2y2m5JPHLVVMZFYM5N1WEB6iTLQ@mail.gmail.com>]
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