From: Carlos O'Donell <carlos@redhat.com>
To: "Maciej W. Rozycki" <macro@wdc.com>,
Alistair Francis <alistair23@gmail.com>
Cc: GNU C Library <libc-alpha@sourceware.org>,
Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PATCH v3 13/19] RISC-V: Add the RV32 libm-test-ulps
Date: Mon, 13 Jul 2020 15:38:56 -0400 [thread overview]
Message-ID: <09d89412-2c59-43c1-680b-c4ffa12fecac@redhat.com> (raw)
In-Reply-To: <alpine.LFD.2.21.2007132015040.24175@redsun52.ssa.fujisawa.hgst.com>
On 7/13/20 3:19 PM, Maciej W. Rozycki via Libc-alpha wrote:
> On Mon, 13 Jul 2020, Alistair Francis wrote:
>
>>> For the record RV32 and RV64 QEMU ULPS results (obtained in the Linux
>>> user emulation mode) match each other in my setup. However those don't
>>> match RV64 results obtained with my HiFive Unleashed hardware, and then
>>> those don't match our existing RV64 results, so I guess they will have to
>>> be regenerated for the upcoming release.
>>
>> Yep, so the current RV64 in tree doesn't match what I generate in QEMU
>> softmmu (full system) emulation for RV64.
>>
>> I kind of assumed that what is in tree matches the Unleased.
>
> For the record here's my RV64 diff to the Unleashed.
>
> Maciej
That's close enough that you should commit this blind to the
development branch that way developers don't get build failures.
We do this routinely for i686 and older hardware being used Fedora Koji
builders.
> Automatic regeneration of ULPs complete.
> Difference between the current baseline and the new baseline is:
> --- ../sysdeps/riscv/rv64/rvd/libm-test-ulps 2020-06-24 19:09:06.149618620 +0100
> +++ .../obj/glibc/lp64d/math/NewUlps 2020-07-13 17:38:39.366490448 +0100
> @@ -61,7 +61,7 @@
>
> Function: "asinh":
> double: 1
> -float: 1
> +float: 2
> ldouble: 3
>
> Function: "asinh_downward":
> @@ -633,6 +633,7 @@
>
> Function: "cos":
> double: 1
> +float: 1
> ldouble: 1
>
> Function: "cos_downward":
> @@ -652,7 +653,7 @@
>
> Function: "cosh":
> double: 1
> -float: 1
> +float: 2
> ldouble: 1
>
> Function: "cosh_downward":
> @@ -947,6 +948,7 @@
> ldouble: 5
>
> Function: "exp":
> +float: 1
> ldouble: 1
>
> Function: "exp10":
> @@ -1055,7 +1057,7 @@
>
> Function: "j0":
> double: 2
> -float: 2
> +float: 8
> ldouble: 2
>
> Function: "j0_downward":
> @@ -1064,23 +1066,23 @@
> ldouble: 4
>
> Function: "j0_towardzero":
> -double: 2
> -float: 1
> +double: 5
> +float: 6
> ldouble: 2
>
> Function: "j0_upward":
> -double: 3
> -float: 2
> +double: 4
> +float: 5
> ldouble: 5
>
> Function: "j1":
> -double: 1
> -float: 2
> +double: 2
> +float: 8
> ldouble: 4
>
> Function: "j1_downward":
> double: 3
> -float: 2
> +float: 5
> ldouble: 4
>
> Function: "j1_towardzero":
> @@ -1224,6 +1226,7 @@
>
> Function: "sin":
> double: 1
> +float: 1
> ldouble: 1
>
> Function: "sin_downward":
> @@ -1321,27 +1324,27 @@
>
> Function: "tgamma":
> double: 5
> -float: 4
> +float: 8
> ldouble: 4
>
> Function: "tgamma_downward":
> double: 5
> -float: 5
> +float: 7
> ldouble: 5
>
> Function: "tgamma_towardzero":
> double: 5
> -float: 4
> +float: 7
> ldouble: 5
>
> Function: "tgamma_upward":
> double: 4
> -float: 4
> +float: 8
> ldouble: 4
>
> Function: "y0":
> double: 2
> -float: 1
> +float: 6
> ldouble: 3
>
> Function: "y0_downward":
> Copy .../obj/glibc/lp64d/math/NewUlps to ../sysdeps/riscv/rv64/rvd/libm-test-ulps (relative to source).
>
> Maciej
>
--
Cheers,
Carlos.
next prev parent reply other threads:[~2020-07-13 19:39 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-12 15:47 [PATCH v3 00/19] glibc port for 32-bit RISC-V (RV32) Alistair Francis
2020-07-12 15:47 ` [PATCH v3 01/19] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 Alistair Francis
2020-07-15 17:29 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 02/19] RISC-V: Cleanup some of the sysdep.h code Alistair Francis
2020-07-16 1:07 ` Maciej W. Rozycki
2020-08-10 15:16 ` Alistair Francis
2020-07-12 15:47 ` [PATCH v3 03/19] RISC-V: Use 64-bit-time syscall numbers with the 32-bit port Alistair Francis
2020-07-16 1:58 ` Maciej W. Rozycki
2020-08-10 15:15 ` Alistair Francis
2020-07-12 15:47 ` [PATCH v3 04/19] RISC-V: Add support for 32-bit vDSO calls Alistair Francis
2020-07-16 0:12 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 05/19] RISC-V: Support dynamic loader for the 32-bit Alistair Francis
2020-07-12 15:47 ` [PATCH v3 06/19] sysv/linux: riscv: Fix dl-cache.h indentation Alistair Francis
2020-07-16 6:31 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 07/19] RISC-V: Add path of library directories for the 32-bit Alistair Francis
2020-07-16 7:03 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 08/19] RISC-V: Add arch-syscall.h for RV32 Alistair Francis
2020-07-12 15:47 ` [PATCH v3 09/19] RISC-V: nptl: update default pthread-offsets.h Alistair Francis
2020-07-12 15:47 ` [PATCH v3 10/19] RISC-V: Support the 32-bit ABI implementation Alistair Francis
2020-07-16 8:23 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 11/19] RISC-V: Hard float support for 32-bit Alistair Francis
2020-07-16 8:27 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 12/19] RISC-V: Add ABI lists Alistair Francis
2020-07-12 15:47 ` [PATCH v3 13/19] RISC-V: Add the RV32 libm-test-ulps Alistair Francis
2020-07-13 17:14 ` Maciej W. Rozycki
2020-07-13 17:32 ` Alistair Francis
2020-07-13 19:19 ` Maciej W. Rozycki
2020-07-13 19:38 ` Carlos O'Donell [this message]
2020-07-30 23:11 ` [PATCH] RISC-V: Update lp64d libm-test-ulps according to HiFive Unleashed Maciej W. Rozycki
2020-08-03 17:52 ` Carlos O'Donell
2020-08-04 12:01 ` Maciej W. Rozycki
2020-07-13 21:26 ` [PATCH v3 13/19] RISC-V: Add the RV32 libm-test-ulps Joseph Myers
2020-07-13 21:30 ` Carlos O'Donell
2020-07-13 21:59 ` Joseph Myers
2020-07-13 22:26 ` Andrew Waterman
2020-07-14 0:00 ` Maciej W. Rozycki
2020-07-14 17:24 ` Joseph Myers
2020-07-12 15:47 ` [PATCH v3 14/19] RISC-V: Fix llrint and llround missing exceptions on RV32 Alistair Francis
2020-07-14 22:13 ` Maciej W. Rozycki
2020-07-22 16:30 ` Alistair Francis
2020-07-12 15:48 ` [PATCH v3 15/19] RISC-V: Build Infastructure for 32-bit Alistair Francis
2020-07-14 23:55 ` Maciej W. Rozycki
2020-08-10 15:45 ` Alistair Francis
2020-07-12 15:48 ` [PATCH v3 16/19] riscv32: Specify the arch_minimum_kernel as 5.4 Alistair Francis
2020-07-15 0:06 ` Maciej W. Rozycki
2020-07-16 1:34 ` Maciej W. Rozycki
2020-07-12 15:48 ` [PATCH v3 17/19] RISC-V: Add rv32 path to RTLDLIST in ldd Alistair Francis
2020-07-15 0:32 ` Maciej W. Rozycki
2020-08-10 20:04 ` Alistair Francis
2020-07-12 15:48 ` [PATCH v3 18/19] Documentation for the RISC-V 32-bit port Alistair Francis
2020-07-13 17:17 ` Adhemerval Zanella
2020-07-14 13:28 ` Alistair Francis
2020-07-15 0:53 ` Maciej W. Rozycki
2020-07-22 16:33 ` Alistair Francis
2020-07-12 15:48 ` [PATCH v3 19/19] Add RISC-V 32-bit target to build-many-glibcs.py Alistair Francis
2020-07-15 1:16 ` Maciej W. Rozycki
2020-07-13 21:15 ` [PATCH v3 00/19] glibc port for 32-bit RISC-V (RV32) Joseph Myers
2020-07-14 13:18 ` Alistair Francis
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