From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 54477 invoked by alias); 10 Nov 2016 23:38:38 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 54468 invoked by uid 89); 10 Nov 2016 23:38:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.8 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1164, applicable, our X-HELO: mx1.redhat.com Message-ID: <1478821111.7146.1016.camel@localhost.localdomain> Subject: Re: Remove sparcv8 support From: Torvald Riegel To: Chris Metcalf Cc: David Miller , carlos@redhat.com, adhemerval.zanella@linaro.org, andreas@gaisler.com, libc-alpha@sourceware.org, software@gaisler.com Date: Thu, 10 Nov 2016 23:38:00 -0000 In-Reply-To: <17b6735b-7376-bb70-5b70-c53fa6fb2c87@mellanox.com> References: <502720f6-3057-41f5-7832-4b219f5f729f@redhat.com> <20161107.113825.631166023186879199.davem@davemloft.net> <1478711295.7146.969.camel@localhost.localdomain> <20161109.121552.63825213147087515.davem@davemloft.net> <06d4798f-cf0b-fb29-04e5-daf9faadf46c@mellanox.com> <1478797727.7146.1013.camel@localhost.localdomain> <17b6735b-7376-bb70-5b70-c53fa6fb2c87@mellanox.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-SW-Source: 2016-11/txt/msg00425.txt.bz2 On Thu, 2016-11-10 at 13:22 -0500, Chris Metcalf wrote: > On 11/10/2016 12:08 PM, Torvald Riegel wrote: > > Looking at tile's atomic-machine.h files again, it seems we're not > > actually enforcing that atomic stores are atomic wrt. the CAS > > implementation in the kernel. > > The default implementation for atomic_store_relaxed in include/atomic.h > > does a plain memory store instead of falling back to exchange. This is > > the right approach by default, I think, because that's what > > pre-C11-concurrency code in glibc does (ie, there's no abstraction for > > an atomic store at all, and plain memory accesses are used). > > > > However, if we emulate CAS with locks or such in the kernel, atomic > > stores need to synchronize with the CAS. This would mean that all archs > > such as tile or sparc that do that have to define atomic_store_relaxed > > to fix this (at least for code converted to using C11 atomics, all > > nonconverted code might still do the wrong thing). > > Note that our mainstream tilegx architecture has full atomic support, so > this is only applicable to the older tilepro architecture. LGTM, thanks.