From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 106397 invoked by alias); 6 Apr 2017 12:04:58 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 106376 invoked by uid 89); 6 Apr 2017 12:04:56 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=H*M:114, acquire X-HELO: mx1.redhat.com DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com F2AC461D1C Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=triegel@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com F2AC461D1C Message-ID: <1491480291.5374.114.camel@redhat.com> Subject: Re: [PATCH 1/2] Optimize generic spinlock code and use C11 like atomic macros. From: Torvald Riegel To: Szabolcs Nagy Cc: Stefan Liebler , libc-alpha@sourceware.org, nd@arm.com Date: Thu, 06 Apr 2017 12:04:00 -0000 In-Reply-To: <58D2746A.90405@arm.com> References: <1481905917-15654-1-git-send-email-stli@linux.vnet.ibm.com> <5857CF10.1060100@arm.com> <628f6311-239c-5eea-572c-c2acae6fcbee@linux.vnet.ibm.com> <1487017743.16322.80.camel@redhat.com> <60a34645-17e4-6693-1343-03c55b0c47ad@linux.vnet.ibm.com> <1487437038.20203.68.camel@redhat.com> <25ad863b-6f20-bfb7-95e6-3b04a2b3eee8@linux.vnet.ibm.com> <1487598702.20203.138.camel@redhat.com> <9c3fc2b3-57b6-b160-3f97-5ce3be05f4c0@linux.vnet.ibm.com> <58D2746A.90405@arm.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-SW-Source: 2017-04/txt/msg00097.txt.bz2 On Wed, 2017-03-22 at 12:56 +0000, Szabolcs Nagy wrote: > On 21/03/17 15:43, Stefan Liebler wrote: > > On 03/14/2017 04:55 PM, Stefan Liebler wrote: > >> Okay. I've attached an updated patch. It is now using case 2). > >> This choice applies to pthread_spin_trylock.c and the first attempt to > >> acquire the lock in pthread_spin_lock.c. > >> Therefore I've introduced ATOMIC_EXCHANGE_USES_CAS for all architectures > >> in atomic-machine.h files. There is a check in include/atomic.h which > >> ensures that it is defined to either 0 or 1. Can you please review the > >> setting of 0 or 1? > >> > >> Bye Stefan > > Ping > > > > the aarch64 changes look ok to me (but this is > something that ideally would be benchmarked on real > hw with interesting workload and i haven't done that > because it is non-trivial) This is something that we need to continue working on. I don't think it's required for this patch. But any further tuning will need some benchmark. I won't have time to work on benchmarks in the foreseeable future I believe; it would be great if you, Stefan, or someone else could continue to work on this. > power consumption of a contended spin lock on armv8 > can be improved using a send-event/wait-event mechanism, > but then the atomic_spin_nop needs to be in a loop with > an ll/sc pair not with a relaxed load. > (i guess we can introduce a target specific spinlock > if this turns out to be relevant) Interesting. I expect the machine maintainers to drive such optimizations in the future; performance differences should be made reproducable using benchmarks contributed to glibc.