From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 71548 invoked by alias); 12 Sep 2017 13:38:06 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 71454 invoked by uid 89); 12 Sep 2017 13:38:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW autolearn=no version=3.3.2 spammy=coherent, Hx-languages-length:2899, fluid X-HELO: mx0a-001b2d01.pphosted.com Subject: Re: [PATCH] powerpc: Use aligned stores in memset From: Steven Munroe Reply-To: munroesj@linux.vnet.ibm.com To: Florian Weimer Cc: Rajalakshmi Srinivasaraghavan , libc-alpha@sourceware.org In-Reply-To: References: <1503033107-20047-1-git-send-email-raji@linux.vnet.ibm.com> Content-Type: text/plain; charset="UTF-8" Date: Tue, 12 Sep 2017 13:38:00 -0000 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 17091213-0024-0000-0000-0000172EA36B X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007711; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000227; SDB=6.00915956; UDB=6.00459911; IPR=6.00696187; BA=6.00005587; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017124; XFM=3.00000015; UTC=2017-09-12 13:37:58 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17091213-0025-0000-0000-00004CAF9982 Message-Id: <1505223476.12360.14.camel@oc7878010663> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-09-12_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1709120191 X-SW-Source: 2017-09/txt/msg00495.txt.bz2 On Tue, 2017-09-12 at 12:30 +0200, Florian Weimer wrote: > On 08/18/2017 11:10 AM, Florian Weimer wrote: > > On 08/18/2017 08:51 AM, Rajalakshmi Srinivasaraghavan wrote: > >> > >> > >> On 08/18/2017 11:51 AM, Florian Weimer wrote: > >>> On 08/18/2017 07:11 AM, Rajalakshmi Srinivasaraghavan wrote: > >>>> * sysdeps/powerpc/powerpc64/power8/memset.S: Store byte by byte > >>>> for unaligned inputs if size is less than 8. > >>> > >>> This makes me rather nervous. powerpc64le was supposed to have > >>> reasonable efficient unaligned loads and stores. GCC happily generates > >>> them, too. > >> > >> This is meant ONLY for caching inhibited accesses. Caching Inhibited > >> accesses are required to be Guarded and properly aligned. > > > > The intent is to support memset for such memory regions, right? This > > change is insufficient. You have to fix GCC as well because it will > > inline memset of unaligned pointers, like this: > > Here's a more complete example: > ..snip > > This means that GCC introduced an unaligned store, no matter how memset > was implemented. > C will do what ever the programmer wants. We can not stop that. And in user mode and cache coherent memory this is not a problem as Adhemerval explained. So we are not going to degrade the performance of general applications for a tiny subset of specialized device drivers. Those guy have to know what they are doing. But in the library (like libc) that might be called from a user mode device driver (Xorg for example) and access Cache inhibited memory the memcpy implementation has to check alignment and size and using the correct instructions for each case. That is what we are doing here. > I could not find the manual which has the requirement that the mem* > functions do not use unaligned accesses. Unless they are worded in a > very peculiar way, right now, the GCC/glibc combination does not comply > with a requirement that memset & Co. can be used for device memory access. > > Furthermore, I find it very peculiar that over-reading device memory is > acceptable. Some memory-mapped devices behave strangely if memory > locations are read out of order or multiple times, and the current glibc > implementation accesses locations which are outside the specified object > boundaries. > Yes device driver writers have to know what they are doing. > So I think the implementation constraint on the mem* functions is wrong. > It leads to a slower implementation of the mem* function for most of > userspace which does not access device memory, and even for device > memory, it is probably not what you want. > We are just trying to make the mem* safe (not segfault or alignment check) if used correctly. The definition of correctly is a bit fluid. I personally disagree with the Xorg folks but so far they have refused to bend... > Thanks, > Florian >